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path: root/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
AgeCommit message (Expand)Author
2025-11-22[AMDGPU] Enable serializing of allocated preload kernarg SGPRs info (#168374)tyb0807
2025-08-08[AMDGPU] AsmPrinter: Unify arg handling (#151672)Diana Picus
2025-07-21[AMDGPU] ISel & PEI for whole wave functions (#145858)Diana Picus
2025-06-24[AMDGPU] Replace dynamic VGPR feature with attribute (#133444)Diana Picus
2025-03-19[AMDGPU] Allocate scratch space for dVGPRs for CWSR (#130055)Diana Picus
2025-01-23[AMDGPU] Occupancy w.r.t. workgroup size range is also a range (#123748)Lucas Ramirez
2024-12-18[AMDGPU] Make max dwords of memory cluster configurable (#119342)Ruiling, Song
2024-11-08Reapply "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#...Shilei Tian
2024-11-08Revert "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#1...Shilei Tian
2024-11-08[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#112403)Shilei Tian
2024-09-13Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (#108512)Diana Picus
2024-09-12Revert "Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (#108054)...Diana Picus
2024-09-12Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (#108054)" (#108173)Diana Picus
2024-09-10Revert "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (#108054)Vitaly Buka
2024-09-10[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic (#105822)Diana Picus
2024-09-05[AMDGPU] V_SET_INACTIVE optimizations (#98864)Carl Ritson
2024-07-15Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and fol...Matt Arsenault
2024-07-14Revert "AMDGPU: Move attributor into optimization pipeline (#83131)" and foll...dyung
2024-07-14AMDGPU: Move attributor into optimization pipeline (#83131)Matt Arsenault
2023-08-21[AMDGPU] Add IsChainFunction to the MachineFunctionInfoDiana Picus
2023-07-07[AMDGPU] Implement whole wave register spillChristudasan Devadasan
2023-06-29[AMDGPU] Reserve SGPR pair when long branches are presentBrendon Cahoon
2023-04-08AMDGPU: Fix missing MIR serialization for PSInputAddr/PSInputEnableMatt Arsenault
2023-01-23AMDGPU: Clean up LDS-related occupancy calculationsNicolai Hähnle
2022-12-21Revert "[AMDGPU][SILowerSGPRSpills] Spill SGPRs to virtual VGPRs"Christudasan Devadasan
2022-12-19[MIR] Convert some tests to opaque pointers (NFC)Nikita Popov
2022-12-17[AMDGPU][SILowerSGPRSpills] Spill SGPRs to virtual VGPRsChristudasan Devadasan
2022-07-19[amdgpu] Implement lds kernel id intrinsicJon Chesterfield
2022-04-19AMDGPU: Serialize VGPRForAGPRCopyMatt Arsenault
2022-04-19AMDGPU: Fix allocating GDS globals to LDS offsetsMatt Arsenault
2022-04-19AMDGPU: Serialize a few more MachineFunctionInfo fields in MIRMatt Arsenault
2022-04-19AMDGPU: Serialize gds size in MIRMatt Arsenault
2022-04-19AMDGPU: Serialize WWM registersMatt Arsenault
2021-12-04AMDGPU: Enable fixed function ABI by defaultMatt Arsenault
2021-09-09AMDGPU: Invert ABI attribute handlingMatt Arsenault
2021-05-25[AMDGPU] Lower kernel LDS into a sorted structureStanislav Mekhanoshin
2021-01-21AMDGPU: Add occupancy to serialized MachineFunctionInfoMatt Arsenault
2020-08-20[amdgpu] Add codegen support for HIP dynamic shared memory.Michael Liao
2020-07-28AMDGPU: Serialize MFI spill fieldsMatt Arsenault
2020-04-02AMDGPU: Assume f32 denormals are enabled by defaultMatt Arsenault
2020-03-19[AMDGPU] Move frame pointer from s34 to s33Scott Linder
2020-03-19[AMDGPU] Add Scratch Wave Offset to Scratch Buffer Descriptor in entry functionsScott Linder
2020-02-04AMDGPU: Split denormal mode tracking bitsMatt Arsenault
2019-11-01AMDGPU: Add default denormal mode to MachineFunctionInfoMatt Arsenault
2019-10-15[Alignment] Migrate Attribute::getWith(Stack)AlignmentGuillaume Chatelet
2019-08-27AMDGPU: Add amdgpu-32bit-address-high-bits to MIR serializationMatt Arsenault
2019-07-10AMDGPU: Serialize mode from MachineFunctionInfoMatt Arsenault
2019-07-08AMDGPU: Make s34 the FP registerMatt Arsenault
2019-07-03[AMDGPU] Enable serializing of argument info.Michael Liao
2019-06-25AMDGPU: Write LDS objects out as global symbols in code generationNicolai Haehnle
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