diff options
| author | Scott Linder <Scott.Linder@amd.com> | 2020-01-21 17:27:57 -0500 |
|---|---|---|
| committer | Scott Linder <Scott.Linder@amd.com> | 2020-03-19 15:35:16 -0400 |
| commit | 60b1967c3933c42f473a3f7be5f40747547b6057 (patch) | |
| tree | b85c9a2f43495a231497f5e976f4dd9991d683c0 /llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll | |
| parent | db099f994b5fb14209e29487b87bc2be54b3725d (diff) | |
[AMDGPU] Add Scratch Wave Offset to Scratch Buffer Descriptor in entry functions
Add the scratch wave offset to the scratch buffer descriptor (SRSrc) in
the entry function prologue. This allows us to removes the scratch wave
offset register from the calling convention ABI.
As part of this change, allow the use of an inline constant zero for the
SOffset of MUBUF instructions accessing the stack in entry functions
when a frame pointer is not requested/required. Entry functions with
calls still need to set up the calling convention ABI stack pointer
register, and reference it in order to address arguments of called
functions. The ABI stack pointer register remains unswizzled, but is now
wave-relative instead of queue-relative.
Non-entry functions also use an inline constant zero SOffset for
wave-relative scratch access, but continue to use the stack and frame
pointers as before. When the stack or frame pointer is converted to a
swizzled offset it is now scaled directly, as the scratch wave offset no
longer needs to be subtracted first.
Update llvm/docs/AMDGPUUsage.rst to reflect these changes to the calling
convention.
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D75138
Diffstat (limited to 'llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll')
| -rw-r--r-- | llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll | 14 |
1 files changed, 4 insertions, 10 deletions
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll b/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll index 87629c3ae3db..95a70cfb33d0 100644 --- a/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll +++ b/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll @@ -16,9 +16,8 @@ ; CHECK-NEXT: memoryBound: false ; CHECK-NEXT: waveLimiter: false ; CHECK-NEXT: scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99' -; CHECK-NEXT: scratchWaveOffsetReg: '$sgpr101' -; CHECK-NEXT: frameOffsetReg: '$sgpr101' -; CHECK-NEXT: stackPtrOffsetReg: '$sgpr101' +; CHECK-NEXT: frameOffsetReg: '$fp_reg' +; CHECK-NEXT: stackPtrOffsetReg: '$sgpr32' ; CHECK-NEXT: argumentInfo: ; CHECK-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' } ; CHECK-NEXT: kernargSegmentPtr: { reg: '$sgpr4_sgpr5' } @@ -50,9 +49,8 @@ define amdgpu_kernel void @kernel(i32 %arg0, i64 %arg1, <16 x i32> %arg2) { ; CHECK-NEXT: memoryBound: false ; CHECK-NEXT: waveLimiter: false ; CHECK-NEXT: scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99' -; CHECK-NEXT: scratchWaveOffsetReg: '$sgpr101' -; CHECK-NEXT: frameOffsetReg: '$sgpr101' -; CHECK-NEXT: stackPtrOffsetReg: '$sgpr101' +; CHECK-NEXT: frameOffsetReg: '$fp_reg' +; CHECK-NEXT: stackPtrOffsetReg: '$sgpr32' ; CHECK-NEXT: argumentInfo: ; CHECK-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr3' } ; CHECK-NEXT: implicitBufferPtr: { reg: '$sgpr0_sgpr1' } @@ -79,12 +77,10 @@ define amdgpu_ps void @ps_shader(i32 %arg0, i32 inreg %arg1) { ; CHECK-NEXT: memoryBound: false ; CHECK-NEXT: waveLimiter: false ; CHECK-NEXT: scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3' -; CHECK-NEXT: scratchWaveOffsetReg: '$sgpr33' ; CHECK-NEXT: frameOffsetReg: '$sgpr34' ; CHECK-NEXT: stackPtrOffsetReg: '$sgpr32' ; CHECK-NEXT: argumentInfo: ; CHECK-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' } -; CHECK-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr33' } ; CHECK-NEXT: mode: ; CHECK-NEXT: ieee: true ; CHECK-NEXT: dx10-clamp: true @@ -108,12 +104,10 @@ define void @function() { ; CHECK-NEXT: memoryBound: false ; CHECK-NEXT: waveLimiter: false ; CHECK-NEXT: scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3' -; CHECK-NEXT: scratchWaveOffsetReg: '$sgpr33' ; CHECK-NEXT: frameOffsetReg: '$sgpr34' ; CHECK-NEXT: stackPtrOffsetReg: '$sgpr32' ; CHECK-NEXT: argumentInfo: ; CHECK-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' } -; CHECK-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr33' } ; CHECK-NEXT: mode: ; CHECK-NEXT: ieee: true ; CHECK-NEXT: dx10-clamp: true |