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| author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2021-05-19 13:39:55 -0700 |
|---|---|---|
| committer | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2021-05-25 11:29:29 -0700 |
| commit | 8de4db697f2841748a5489d18d9fbcd130ae09bb (patch) | |
| tree | 146db53095896223ea27ad40a7f26ed221fff66e /llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll | |
| parent | ca7eaa0a54938bfe9aeed7ebc64202f0b6f2ce0d (diff) | |
[AMDGPU] Lower kernel LDS into a sorted structure
Differential Revision: https://reviews.llvm.org/D102954
Diffstat (limited to 'llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll')
| -rw-r--r-- | llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll b/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll index a9736c471bf9..b10e96cf30e5 100644 --- a/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll +++ b/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll @@ -10,7 +10,7 @@ ; CHECK: machineFunctionInfo: ; CHECK-NEXT: explicitKernArgSize: 128 ; CHECK-NEXT: maxKernArgAlign: 64 -; CHECK-NEXT: ldsSize: 0 +; CHECK-NEXT: ldsSize: 2048 ; CHECK-NEXT: dynLDSAlign: 1 ; CHECK-NEXT: isEntryFunction: true ; CHECK-NEXT: noSignedZerosFPMath: false |