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path: root/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
AgeCommit message (Expand)Author
2025-11-11[AMDGPU] Remove implicit conversions of MCRegister to unsigned. NFC (#167284)Craig Topper
2025-10-16[AMDGPU][NFC] Remove a duplicate isInlinableLiteralBF16() declaration.Ivan Kosarev
2025-10-08[AMDGPU][MC] Avoid creating lit64() operands unless asked or needed. (#161191)Ivan Kosarev
2025-10-08AMDGPU: Use RegClassByHwMode to manage operand VGPR operand constraints (#158...Matt Arsenault
2025-10-08AMDGPU: Account for read/write register intrinsics for AGPR usage (#161988)Matt Arsenault
2025-09-25AMDGPU: Ensure both wavesize features are not set (#159234)Matt Arsenault
2025-09-16[AMDGPU][MC] Keep MCOperands unencoded. (#158685)Ivan Kosarev
2025-09-15[AMDGPU][Attributor] Add `AAAMDGPUClusterDims` (#158076)Shilei Tian
2025-09-12[AMDGPU] Support lowering of cluster related instrinsics (#157978)Shilei Tian
2025-09-04[AMDGPU] High VGPR lowering on gfx1250 (#156965)Stanislav Mekhanoshin
2025-09-04[AMDGPU] Tail call support for whole wave functions (#145860)Diana Picus
2025-09-03AMDGPU: Replace constexpr with inlineMatt Arsenault
2025-09-03AMDGPU: Refactor isImmOperandLegal (#155607)Matt Arsenault
2025-08-19[AMDGPU] Check noalias.addrspace in mayAccessScratchThroughFlat (#151319)Pierre van Houtryve
2025-08-14[AMDGPU] Don't allow wgp mode on gfx1250 (#153680)Stanislav Mekhanoshin
2025-08-11[AMDGPU] Per-subtarget DPP instruction classification (#153096)Stanislav Mekhanoshin
2025-08-07[AMDGPU] Restrict packed math FP32 instructions to read only one SGPR per ope...Stanislav Mekhanoshin
2025-08-01AMDGPU: Move asm constraint physreg parsing to utils (#150903)Matt Arsenault
2025-07-30[AMDGPU] Add v_cvt_sr|pk_bf8|fp8_f16 gfx1250 instructions (#151415)Stanislav Mekhanoshin
2025-07-21[AMDGPU] MC support for gfx1250 scale_offset modifier (#149881)Stanislav Mekhanoshin
2025-07-21AMDGPU: Support v_wmma_f32_16x16x128_f8f6f4 on gfx1250 (#149684)Changpeng Fang
2025-07-21[AMDGPU] ISel & PEI for whole wave functions (#145858)Diana Picus
2025-07-16AMDGPU: Treat WMMA XDL ops as TRANS in S_DELAY_ALU insertion for gfx1250 (#14...Changpeng Fang
2025-07-11[AMDGPU] MC support for v_fmaak_f64/v_fmamk_f64 gfx1250 intructions (#148282)Stanislav Mekhanoshin
2025-07-10[AMDGPU] VOPD/VOPD3 changes for gfx1250 (#147602)Stanislav Mekhanoshin
2025-07-03AMDGPU: Implement tensor load and store instructions for gfx1250 (#146636)Changpeng Fang
2025-06-25[AMDGPU][GFX1250] Insert S_WAIT_XCNT for SMEM and VMEM load-stores (#145566)Christudasan Devadasan
2025-06-24[AMDGPU] Replace dynamic VGPR feature with attribute (#133444)Diana Picus
2025-06-21[AMDGPU] Rename call instructions from b64 to i64 (#145103)Stanislav Mekhanoshin
2025-06-05[AMDGPU] Remove duplicated/confusing helpers. NFCI (#142598)Diana Picus
2025-05-13Reapply "[AMDGPU][Scheduler] Refactor ArchVGPR rematerialization during sched...Lucas Ramirez
2025-05-09Revert "[AMDGPU][Scheduler] Refactor ArchVGPR rematerialization during schedu...Vitaly Buka
2025-05-09[AMDGPU][NFC] Remove _DEFERRED operands. (#139123)Ivan Kosarev
2025-05-08[AMDGPU][NFC] Remove unused operand types. (#139062)Ivan Kosarev
2025-05-08[AMDGPU][Scheduler] Refactor ArchVGPR rematerialization during scheduling (#1...Lucas Ramirez
2025-04-10[AMDGPU] Add support for point sample accel out of order returns (#127991)David Stuttard
2025-03-29[NFC][AMDGPU] clang-format `AMDGPUBaseInfo.[h,cpp]` (#133559)Shilei Tian
2025-03-27[AMDGPU] Add a new function `getIntegerPairAttribute` (#133271)Shilei Tian
2025-03-12[AMDGPU] Merge consecutive wait_alu instruction (#128916)Ana Mihajlovic
2025-03-04AMDGPU: Remove repeated define in base info headerMatt Arsenault
2025-02-18[AMDGPU][True16][CodeGen] reopen "FLAT_load using D16 pseudo instruction" (#1...Brox Chen
2025-02-18Revert "[AMDGPU][True16][CodeGen] FLAT_load using D16 pseudo instruction (#11...Nikita Popov
2025-02-18[AMDGPU][True16][CodeGen] FLAT_load using D16 pseudo instruction (#114500)Brox Chen
2025-02-12[TableGen] Emit OpName as an enum class instead of a namespace (#125313)Rahul Joshi
2025-02-04[AMDGPU] Simplify Waitcnt constructor. NFC. (#125672)Jay Foad
2025-01-30[AMDGPU] Rewrite GFX12 SGPR hazard handling to dedicated pass (#118750)Carl Ritson
2024-12-11[AMDGPU][Attributor] Make `AAAMDFlatWorkGroupSize` honor existing attribute (...Shilei Tian
2024-12-11[AMDGPU] Handle hazard in v_scalef32_sr_fp4_* conversions (#118589)Pravin Jagtap
2024-12-02AMDGPU: Handle cvt_scale F32/F16->F4/F8 gfx950 hazard (#117844)Matt Arsenault
2024-11-26AMDGPU: Verify f8f6f4 formats in assembler (#117826)Matt Arsenault
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