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path: root/llvm/lib/Target/AMDGPU/Utils
AgeCommit message (Expand)Author
2025-11-17[AMDGPU] update LDS block size for gfx1250 (#167614)Changpeng Fang
2025-11-14[AMDGPU] Fix wrong MSB encoding for V_FMAMK instructions (#168107)Shilei Tian
2025-11-11[AMDGPU] Remove implicit conversions of MCRegister to unsigned. NFC (#167284)Craig Topper
2025-10-16[AMDGPU][NFC] Remove a duplicate isInlinableLiteralBF16() declaration.Ivan Kosarev
2025-10-08[AMDGPU][MC] Avoid creating lit64() operands unless asked or needed. (#161191)Ivan Kosarev
2025-10-08AMDGPU: Use RegClassByHwMode to manage operand VGPR operand constraints (#158...Matt Arsenault
2025-10-08AMDGPU: Account for read/write register intrinsics for AGPR usage (#161988)Matt Arsenault
2025-10-06[AMDGPU] Remove subtarget features for dynamic VGPRs (#160822)Diana Picus
2025-09-25[AMDGPU] Add GFX12 wave register names with WAVE_ prefix (#144352)Aleksandar Spasojevic
2025-09-25AMDGPU: Ensure both wavesize features are not set (#159234)Matt Arsenault
2025-09-23[AMDGPU] Fix high vgpr printing with true16 (#160209)Stanislav Mekhanoshin
2025-09-23[AMDGPU] Add PAL metadata names for 32 user SGPRs (#160126)Jay Foad
2025-09-22[AMDGPU] Simplify "class HasMember##member" with llvm::is_detected (NFC) (#16...Kazu Hirata
2025-09-21[AMDGPU] Simplify template metaprogramming in IsMCExpr##member (NFC) (#160005)Kazu Hirata
2025-09-16[AMDGPU][MC] Keep MCOperands unencoded. (#158685)Ivan Kosarev
2025-09-15[AMDGPU][Attributor] Add `AAAMDGPUClusterDims` (#158076)Shilei Tian
2025-09-12[AMDGPU] Support lowering of cluster related instrinsics (#157978)Shilei Tian
2025-09-11[AMDGPU] Use subtarget call to determine number of VGPRs (#157927)Stanislav Mekhanoshin
2025-09-08[AMDGPU] Add MSG_RTN_GET_CLUSTER_BARRIER_STATE (#157549)Stanislav Mekhanoshin
2025-09-05[AMDGPU] Prevent VOPD combining of VGPRs with different MSBs (#157168)Stanislav Mekhanoshin
2025-09-04[AMDGPU] High VGPR lowering on gfx1250 (#156965)Stanislav Mekhanoshin
2025-09-04[AMDGPU] Ensure positive InstOffset for buffer operations (#145504)Aleksandar Spasojevic
2025-09-04[AMDGPU] Tail call support for whole wave functions (#145860)Diana Picus
2025-09-03[AMDGPU] Define 1024 VGPRs on gfx1250 (#156765)Stanislav Mekhanoshin
2025-09-03AMDGPU: Replace constexpr with inlineMatt Arsenault
2025-09-03AMDGPU: Refactor isImmOperandLegal (#155607)Matt Arsenault
2025-09-02[AMDGPU] Adjust VGPR allocation encoding on gfx1250 (#156546)Stanislav Mekhanoshin
2025-09-02[AMDGPU] Fix hw stage metadata setting for unsigned values (#154502)Ana Mihajlovic
2025-08-22[AMDGPU] Common up two local memory size calculations. NFCI. (#154784)Jay Foad
2025-08-19[AMDGPU] Check noalias.addrspace in mayAccessScratchThroughFlat (#151319)Pierre van Houtryve
2025-08-18[AMDGPU] User SGPR count increased to 32 on gfx1250 (#154205)Stanislav Mekhanoshin
2025-08-14[AMDGPU] Don't allow wgp mode on gfx1250 (#153680)Stanislav Mekhanoshin
2025-08-14[AMDGPU] Increase LDS to 320K on gfx1250 (#153645)Stanislav Mekhanoshin
2025-08-13[AMDGPU] Add MSG_SAVEWAVE_HAS_TDM on gfx1250 (#153483)Stanislav Mekhanoshin
2025-08-13[AMDGPU] Add HW_REG_IB_STS2 on gfx1250 (#153479)Stanislav Mekhanoshin
2025-08-11[AMDGPU] Per-subtarget DPP instruction classification (#153096)Stanislav Mekhanoshin
2025-08-07[AMDGPU] Restrict packed math FP32 instructions to read only one SGPR per ope...Stanislav Mekhanoshin
2025-08-06[AMDGPU] Add XNACK_STATE_PRIV and _MASK gfx1250 registers (#152374)Stanislav Mekhanoshin
2025-08-05[AMDGPU] Add MC support for new gfx1250 src_flat_scratch_base_lo/hi (#152203)Stanislav Mekhanoshin
2025-08-01AMDGPU: Move asm constraint physreg parsing to utils (#150903)Matt Arsenault
2025-07-30[AMDGPU] Add v_cvt_sr|pk_bf8|fp8_f16 gfx1250 instructions (#151415)Stanislav Mekhanoshin
2025-07-28[AMDGPU] MC support for async load and store on gfx1250 (#151030)Changpeng Fang
2025-07-21[AMDGPU] MC support for gfx1250 scale_offset modifier (#149881)Stanislav Mekhanoshin
2025-07-21AMDGPU: Support v_wmma_f32_16x16x128_f8f6f4 on gfx1250 (#149684)Changpeng Fang
2025-07-21[AMDGPU] ISel & PEI for whole wave functions (#145858)Diana Picus
2025-07-16AMDGPU: Treat WMMA XDL ops as TRANS in S_DELAY_ALU insertion for gfx1250 (#14...Changpeng Fang
2025-07-14[AMDGPU] Add gfx1250 v_fmac_f64 implementation (#148725)Stanislav Mekhanoshin
2025-07-11[AMDGPU] MC support for v_fmaak_f64/v_fmamk_f64 gfx1250 intructions (#148282)Stanislav Mekhanoshin
2025-07-10[AMDGPU] VOPD/VOPD3 changes for gfx1250 (#147602)Stanislav Mekhanoshin
2025-07-09[AMDGPU] gfx1250: MC support for 64-bit literals (#147861)Stanislav Mekhanoshin
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