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2025-11-22[RISCV] Support zilsd-4byte-align for i64 load/store in SelectionDAG. (#169182)Craig Topper
2025-11-23Revert "[RegAlloc] Fix the terminal rule check for interfere with DstReg (#16...Aiden Grossman
2025-11-23[RegAlloc] Fix the terminal rule check for interfere with DstReg (#168661)hstk30-hw
2025-11-22[llvm] Use llvm::equal (NFC) (#169173)Kazu Hirata
2025-11-22[llvm] Remove unused local variables (NFC) (#169171)Kazu Hirata
2025-11-22[VPlan] Share PreservesUniformity logic between isSingleScalar and isUniformA...Florian Hahn
2025-11-22[AMDGPU] Enable serializing of allocated preload kernarg SGPRs info (#168374)tyb0807
2025-11-22[VPlan] Create resume phis in scalar preheader early. (NFC) (#166099)Florian Hahn
2025-11-22[DFAJumpThreading] Try harder to avoid cycles in paths. (#169151)Usman Nadeem
2025-11-22[InstCombine] Generalize trunc-shift-icmp fold from (1 << Y) to (Pow2 << Y) (...Pedro Lobo
2025-11-22Add new llvm.dbg.declare_value intrinsic. (#168132)Shubham Sandeep Rastogi
2025-11-22[CallBrPrepare] Prefer Function &F over Function &FnAiden Grossman
2025-11-21[SCEVExp] Remove early exit, rely on InstSimplifyFolder (NFCI).Florian Hahn
2025-11-21[DA] remove Constraints class (#168963)Sebastian Pop
2025-11-22[DAGCombiner] Don't optimize insert_vector_elt into shuffle if implicit trunc...Hongyu Chen
2025-11-21AMDGPU: Improve getShuffleCost accuracy for 8- and 16-bit shuffles (#168818)Nicolai Hähnle
2025-11-21[profcheck] Propagate profile metadata to Wrapper function in optimize mode o...Jin Huang
2025-11-21AMDGPU: Handle invariant when lowering global loads (#168914)Matt Arsenault
2025-11-21Revert "[ORC] Tailor ELF debugger support plugin to load-address patching onl...Stefan Gränitz
2025-11-21[HLSL] Add Load overload with status (#166449)Joshua Batista
2025-11-21[Support] Use range-based for loops (NFC) (#169001)Kazu Hirata
2025-11-21Revert "[AMDGPU] Remove leftover implicit operands from SI_SPILL/SI_RESTORE."...Nathan Corbyn
2025-11-21[RISCV] Incorporate scalar addends to extend vector multiply accumulate chain...Ryan Buchner
2025-11-21[profdata] Skip probes with missing counter and function pointers (#163254)Ellis Hoag
2025-11-21[LTO] Use a range-based for loop (NFC) (#169000)Kazu Hirata
2025-11-21[DA] remove getSplitIteration (#167698)Sebastian Pop
2025-11-21[ARM] Restore hasSideEffects flag on t2WhileLoopSetup (#168948)Sergei Barannikov
2025-11-21[OpenMP][OMPIRBuilder] Use runtime CC for runtime calls (#168608)Nick Sarnie
2025-11-21[AMDGPU] Handle AV classes in SIFixSGPRCopies::processPHINode (#169038)Jay Foad
2025-11-21AMDGPU: Stop implementing shouldCoalesce (#168988)Matt Arsenault
2025-11-21[TySan][Clang] Add clang flag to use tysan outlined instrumentation a… (#16...Matthew Nagy
2025-11-21[VPlan] Cast to VPIRMetadata in getMemoryLocation (NFC) (#169028)Ramkumar Ramachandra
2025-11-21[VPlan] Only apply forced cost to recipes with underlying values. (#168372)Florian Hahn
2025-11-21[AMDGPU] Enable multi-group xnack replay in hardware (GFX1250) (#169016)Christudasan Devadasan
2025-11-21[LoopCacheAnalysis] Replace delinearization for fixed size array (#164798)Ryotaro Kasuga
2025-11-21[ORC] Tailor ELF debugger support plugin to load-address patching only (#168518)Stefan Gränitz
2025-11-21[RISCV] Update SpacemiT-X60 vector mask instructions latencies (#150644)Mikhail R. Gadelha
2025-11-21[OpenMP] Introduce "loop sequence" as directive association (#168934)Krzysztof Parzyszek
2025-11-21[AArch64] Avoid introducing illegal types in LowerVECTOR_COMPRESS (NFC) (#168...Benjamin Maxwell
2025-11-21[NVPTX] Support for dense and sparse MMA intrinsics with block scaling. (#163...Kirill Vedernikov
2025-11-21[VPlan] Drop poison-generating flags on induction trunc (#168922)Ramkumar Ramachandra
2025-11-21[PowerPC] Replace vspltisw+vadduwm instructions with xxleqv+vsubuwm for addin...Himadhith
2025-11-21[NVPTX] Fix PTX and SM conditions for narrow FP conversions (#168680)Srinivasa Ravi
2025-11-21[PowerPC] Fix Wparentheses warningJim Lin
2025-11-21[llvm][RISCV] Implement Zilsd load/store pair optimization (#158640)Brandon Wu
2025-11-20TargetLowering: Avoid hardcoding OpenBSD + __guard_local name (#167744)Matt Arsenault
2025-11-20AMDGPU: Don't duplicate implicit operands in 3-address conversion (#168426)Nicolai Hähnle
2025-11-20[RISCV] Use SDT_RISCVIntUnaryOpW for RISCVISD::ABSW type profile. NFC (#168932)Craig Topper
2025-11-20[RISCV] Only add v2i32 to GPR regclass in the RV64 hardware mode. (#168930)Craig Topper
2025-11-20[DA] remove constraint propagation (#160924)Sebastian Pop
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