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path: root/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
AgeCommit message (Expand)Author
2025-11-19[TTI] Use MemIntrinsicCostAttributes for getMaskedMemoryOpCost (#168029)Shih-Po Hung
2025-11-11[RISCV][llvm] Preliminary P extension codegen support (#162668)Brandon Wu
2025-11-10[RISCV][TTI] Fix crash of non-built-in vector type cost quering. (#167258)Elvis Wang
2025-11-07[llvm][RISCV] Do not assume V extension on seeing vector type. (#166994)Chenguang Wang
2025-10-07[ASan][RISCV] Support asan check for segment load/store RVV intrinsics. (#161...Hank Chang
2025-10-01[RISCV] Allow non-canonicalized splats in isProfitableToSinkOperands (#161586)Philip Reames
2025-09-29[RISCV] Teach getIntImmCostInst about (X & -(1 << C1) & 0xffffffff) == C2 << ...Craig Topper
2025-09-26Revert "[TTI][RISCV] Add cost modelling for intrinsic vp.load.ff (#160470)"ShihPo Hung
2025-09-27[ASan][RISCV] Teach AddressSanitizer to support indexed load/store. (#160443)Hank Chang
2025-09-26[TTI][RISCV] Add cost modelling for intrinsic vp.load.ff (#160470)Shih-Po Hung
2025-09-23[TTI][ASan][RISCV] reland Move InterestingMemoryOperand to Analysis and embed...Hank Chang
2025-09-18Revert "[TTI][ASan][RISCV] Move InterestingMemoryOperand to Analysis and embe...Florian Mayer
2025-09-19[TTI][ASan][RISCV] Move InterestingMemoryOperand to Analysis and embed in Mem...Hank Chang
2025-09-12[RISCV] Use hasCPOPLike in isCtpopFast and getPopcntSupport (#158371)Craig Topper
2025-09-02[Reland] "[RISCV][TTI] Implement getAddressComputationCost() in RISCV TTI. #1...Elvis Wang
2025-08-30[RISCV] Unaligned vec mem => prefer alt opc vecMikhail Gudim
2025-08-27Revert "[RISCV][TTI] Implement getAddressComputationCost() in RISCV TTI." (#1...Elvis Wang
2025-08-27[RISCV][TTI] Implement getAddressComputationCost() in RISCV TTI. (#149955)Elvis Wang
2025-08-19[LV][TTI] Calculate cost of extracting last index in a scalable vector (#144086)David Sherwood
2025-08-18[RISCV] Remove ST->hasVInstructions() from getIntrinsicInstrCost for cttz/ctl...Jim Lin
2025-08-12[RISCV] Cost casts with illegal types that can't be legalized (#153030)Luke Lau
2025-08-05[RISCV][TTI] Enable masked interleave access (#151665)Mel Chen
2025-07-31[RISCV] Adjust unroll prefs for loops with vectors (#151525)Ramkumar Ramachandra
2025-07-30[RISCV] Fix bug in [l](lrint|lround) vector-cost (#151298)Ramkumar Ramachandra
2025-07-29[RISCV] Fix build failure in getIntrinsicInstrCost (#151210)Ramkumar Ramachandra
2025-07-29[CostModel/RISCV] Fix costs of vector [l](lrint|lround) (#146058)Ramkumar Ramachandra
2025-07-25Revert "[RISCV][TTI] Enable masked interleave access for scalable vector (#14...Alex Bradbury
2025-07-25[RISCV][TTI] Enable masked interleave access for scalable vector (#149981)Mel Chen
2025-07-23[RISCV][TTI] Implement vector costs for `llvm.fpto{u|s}i.sat()`. (#143655)Elvis Wang
2025-07-10[RISCV] Unify non-vp and vp rounding intrinsic costing (#147872)Luke Lau
2025-07-10[TTI] Move vp.{select,merge} costing from RISCV to BasicTTIImpl. NFC (#147870)Luke Lau
2025-06-21[CostModel] Add a DstTy to getShuffleCost (#141634)David Green
2025-06-19[TTI] Plumb CostKind through getPartialReductionCost (#144953)Philip Reames
2025-06-18[TTI] Remove PPC hasActiveVectorLength impl, simplify interface (NFC). (#142310)Florian Hahn
2025-06-18[RISCV] Support non-power-of-2 types when expanding memcmpPengcheng Wang
2025-06-17[RISCV] Consolidate both copies of getLMUL1VT [nfc] (#144568)Philip Reames
2025-06-16[RISCV] Use RISCV::RVVBitsPerBlock instead of 64 in getLMUL1VT. NFC (#144401)Craig Topper
2025-06-16[RISCV][TTI] Refine reverse shuffle costing for high LMUL (#144155)Philip Reames
2025-06-13[RISCV] Support memcmp expansion for vectorsPengcheng Wang
2025-06-10[RISCV][TTI] Allow partial reduce with mismatched extends (#143608)Philip Reames
2025-05-30[RISCV][TTI] Discount slide cost if ri.vinsert/ri.vextract are available (#14...Philip Reames
2025-05-26[RISCV][TTI] Adjust costing in getPartialReductionCost for zvqdotq (#141430)Philip Reames
2025-05-23[RISCV][TTI] Implement getPartialReductionCost for the vqdotq cases (#140974)Philip Reames
2025-05-01[CostModel] Make Op0 and Op1 const in getVectorInstrCost. NFC (#137631)David Green
2025-04-30[SLPVectorizer] Move X86 specific handling into X86TTIImpl. (#137830)Jonas Paulsson
2025-04-27[RISCV] Sink vp.splat operands of VP intrinsic. (#133245)MingYan
2025-04-23[CostModel] Remove optional from InstructionCost::getValue() (#135596)David Green
2025-04-22Fix build error introduced by 1c722fcPhilip Reames
2025-04-22[RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (#136191)Philip Reames
2025-04-22[TTI] Fix discrepancies in prototypes between interface and implementations (...Sergei Barannikov
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