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path: root/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
AgeCommit message (Expand)Author
2025-11-17[AMDGPU] TableGen-erate SDNode descriptions (#168248)Sergei Barannikov
2025-09-04[AMDGPU] Tail call support for whole wave functions (#145860)Diana Picus
2025-07-21[AMDGPU] ISel & PEI for whole wave functions (#145858)Diana Picus
2025-03-20[AMDGPU] Dynamic VGPR support for llvm.amdgcn.cs.chain (#130094)Diana Picus
2024-11-24[AMDGPU] Fix AMDGPUISD::TRAP description (#117453)Sergei Barannikov
2024-04-24[AMDGPU] Add a trap lowering workaround for gfx11 (#85854)Emma Pilkington
2023-12-13[AMDGPU] Min/max changes for GFX12 (#75214)Piotr Sobczak
2023-11-30[AMDGPU] Don't create mulhi_24 in CGP (#72983)Pierre van Houtryve
2023-11-06[AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (#68186)Diana
2023-09-07AMDGPU: Remove unused node definitionMatt Arsenault
2023-07-05AMDGPU: Correctly lower llvm.exp2.f32Matt Arsenault
2023-06-23AMDGPU: Use correct lowering for llvm.log2.f32Matt Arsenault
2023-06-15AMDGPU: Add llvm.amdgcn.exp2 intrinsicMatt Arsenault
2023-06-12AMDGPU: Add llvm.amdgcn.log intrinsicMatt Arsenault
2023-06-09AMDGPU: Avoid endpgm in middle of block for fallback trap lowering.Matt Arsenault
2023-06-06IR: Add llvm.ldexp and llvm.experimental.constrained.ldexp intrinsicsMatt Arsenault
2023-04-27AMDGPU: Define sub-class of SGPR_64 for tail call returnChangpeng Fang
2023-04-02[Targets] Rename Flag->Glue. NFCCraig Topper
2022-11-28[AMDGPU] Add llvm.is.fpclass intrinsic to existing SelectionDAG fpJanek van Oirschot
2022-03-09[AMDGPU] Move call clobbered return address registers s[30:31] to callee save...Venkata Ramanaiah Nalamothu
2021-12-22Revert "[AMDGPU] Move call clobbered return address registers s[30:31] to cal...Ron Lieberman
2021-12-22[AMDGPU] Move call clobbered return address registers s[30:31] to callee save...RamNalamothu
2021-11-04[AMDGPU] Changes the AMDGPU_Gfx calling convention by making the SGPRs 4..29 ...Thomas Symalla
2021-10-26[AMDGPU] Implement llvm.amdgcn.mulhi.[i,u]24 intrinsics.Abinav Puthan Purayil
2021-08-25[NFC][AMDGPU] Reduce includes dependencies.Daniil Fukalov
2021-06-22AMDGPU: Move zeroed FP high bits optimization to patternsMatt Arsenault
2021-05-06[AMDGPU] Expose __builtin_amdgcn_perm for v_perm_b32Stanislav Mekhanoshin
2021-02-08[AMDGPU]: Fixes an invalid clamp selection pattern.Thomas Symalla
2021-02-03Revert "[AMDGPU] Add a new Clamp Pattern to the GlobalISel Path."Sebastian Neubauer
2021-02-02Added and used new target pseudo for v_cvt_pk_i16_i32, changes due to code re...Thomas Symalla
2020-06-16AMDGPU: Remove intermediate DAG node for trig_preop intrinsicMatt Arsenault
2020-05-28AMDGPU: Add intrinsic for s_setregMatt Arsenault
2020-04-23[llvm] NFC: Fix trivial typo in rst and td filesKazuaki Ishizaki
2020-04-17AMDGPU: Remove custom node for RSQ_LEGACYMatt Arsenault
2020-04-06AMDGPU/GlobalISel: Fix llvm.amdgcn.div.fmas.llMatt Arsenault
2020-02-21AMDGPU/GlobalISel: Select llvm.amdgcn.fdot2Matt Arsenault
2020-02-21AMDGPU/GlobalISel: Select llvm.amdgcn.fmul.legacyMatt Arsenault
2020-02-17AMDGPU/GlobalISel: Handle sbfe/ubfe intrinsicMatt Arsenault
2020-02-12AMDGPU/GlobalISel: Select G_CTTZ_ZERO_UNDEFMatt Arsenault
2020-02-12AMDGPU/GlobalISel: Select G_CTLZ_ZERO_UNDEFMatt Arsenault
2020-02-09AMDGPU: Remove dead kill handlingMatt Arsenault
2020-01-29AMDGPU: Directly select 16-bank LDS case of llvm.amdgcn.interp.p1.f16Matt Arsenault
2020-01-15AMDGPU: Remove custom node for exportsMatt Arsenault
2019-12-30AMDGPU/GlobalISel: Select mul24 intrinsicsMatt Arsenault
2019-12-30AMDGPU/GlobalISel: Select llvm.amdgcn.fmad.ftzMatt Arsenault
2019-12-24AMDGPU/GlobalISel: Fix mapping and selection of llvm.amdgcn.div.fixupMatt Arsenault
2019-10-21AMDGPU: Select basic interp directly from intrinsicsMatt Arsenault
2019-09-10AMDGPU/GlobalISel: Select cvt pk intrinsicsMatt Arsenault
2019-09-10AMDGPU/GlobalISel: Select llvm.amdgcn.sffbhMatt Arsenault
2019-09-09AMDGPU/GlobalISel: Select llvm.amdgcn.classMatt Arsenault
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