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path: root/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
AgeCommit message (Expand)Author
2025-11-10CodeGen: Remove TRI argument from getRegClass (#158225)Matt Arsenault
2025-09-12CodeGen: Remove MachineFunction argument from getRegClass (#158188)Matt Arsenault
2025-08-07[AArch64] Allow splitting bitmasks for EOR/ORR. (#150394)Ricardo Jesus
2025-07-30[AArch64] Refactor AND/ANDS bitmask splitting (NFC). (#150619)Ricardo Jesus
2025-07-22[AArch64] Allow splitting bitmasks for ANDS. (#149095)Ricardo Jesus
2025-04-14AArch64: Allow ZEXT+COPY -> FMOV peephole for ZPR registers as well (#135436)Matthias Braun
2025-04-07[NFC][LLVM][AArch64] Cleanup pass initialization for AArch64 (#134315)Rahul Joshi
2024-11-21Fix typo "intead"Jay Foad
2024-09-17[AArch64] Fold UBFMXri to UBFMWri when it's an LSR or LSL alias (#106968)Csanád Hajdú
2024-08-20[AArch64] Extend sxtw peephole to uxtw. (#104516)David Green
2024-08-05[AArch64] Peephole optimization to remove redundant csel instructions (#101483)Marina Taylor
2024-08-01[AArch64] Format comment to fit into line-length. NFCDavid Green
2024-07-19[AArch64] Remove superfluous sxtw in peephole opt (#96293)David Green
2024-07-17Revert "[AArch64] Remove superfluous sxtw in peephole opt (#96293)"Krasimir Georgiev
2024-07-11[AArch64] Remove superfluous sxtw in peephole opt (#96293)David Green
2024-07-09[CodeGen][NewPM] Port `machine-loops` to new pass manager (#97793)paperchalice
2024-03-27[AArch64] Clear kill flags when removing FMOVDr. (#86308)David Green
2024-02-27[AArch64] Use FMOVDr for clearing upper bits (#83107)David Green
2023-07-12[AArch64] Fix order of isReg and isDef checks in INSvi64 peephole.David Green
2023-07-10[AArch64] Ensure constrained register class in INS peephole.David Green
2023-05-11[AArch64] Update Changed status in AArch64MIPeepholeOptDavid Green
2023-05-05[AArch64] Extend fp64 top zeroing peephole to all instructionsDavid Green
2023-04-03[AArch64] Remove redundant `mov 0` instruction for high 64-bitsJingu Kang
2023-02-27[AArch64] Fix a warningKazu Hirata
2023-02-27[AArch64] Avoid using intermediate integer registers for copying between sour...Nilanjana Basu
2023-02-08[AArch64] Fix creation of invalid instructions with XZR registerDavid Green
2023-01-28[Target] Use llvm::count{l,r}_{zero,one} (NFC)Kazu Hirata
2022-12-05Remove unused #include "llvm/ADT/Optional.h"Fangrui Song
2022-12-04[Target] llvm::Optional => std::optionalFangrui Song
2022-12-02[Target] Use std::nullopt instead of None (NFC)Kazu Hirata
2022-09-17[llvm] Don't including SetVector.h (NFC)Kazu Hirata
2022-09-08[AArch64] Fix -Wunused-variable. NFCFangrui Song
2022-09-09[Peephole] rewrite INSERT_SUBREG to SUBREG_TO_REG if upper bits zerozhongyunde
2022-06-20[llvm] Don't use Optional::getValue (NFC)Kazu Hirata
2022-06-08[AArch64] Remove ToBeRemoved from AArch64MIPeepholeOptDavid Green
2022-06-07[AArch64] Remove isDef32David Green
2022-02-19[AArch64] Adds SUBS and ADDS instructions to the MIPeepholeOpt.Micah Weston
2022-02-13Revert "[AArch64] Adds SUBS and ADDS instructions to the MIPeepholeOpt."Nathan Chancellor
2022-02-12[AArch64] Adds SUBS and ADDS instructions to the MIPeepholeOpt.Micah Weston
2022-01-26[AArch64] Fixes ADD/SUB opt bug and abstracts shared behavior in MIPeepholeOp...Micah Weston
2022-01-22[AArch64] Optimize add/sub with immediate through MIPeepholeOptMicah Weston
2022-01-18Revert "[AArch64] Revive optimize add/sub with immediate through MIPeepholeOpt"Florian Hahn
2022-01-17[AArch64] Revive optimize add/sub with immediate through MIPeepholeOptMicah Weston
2021-12-28[AArch64] Minor AArch64MIPeepholeOpt cleanup. NFCDavid Green
2021-11-03Revert "[AArch64] Optimize add/sub with immediate"Ben Shi
2021-11-03[AArch64] Optimize add/sub with immediateBen Shi
2021-10-25[AArch64] Remove redundant ORRWrs which is generated by zero-extendJingu Kang
2021-10-18[AArch64] Fixed a bug on AArch64MIPeepholeOptJingu Kang
2021-10-16Revert "[AArch64] Optimize add/sub with immediate"Ben Shi
2021-10-16[AArch64] Optimize add/sub with immediateBen Shi
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