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path: root/llvm/lib/Target/AArch64
AgeCommit message (Expand)Author
2025-11-21[AArch64] Avoid introducing illegal types in LowerVECTOR_COMPRESS (NFC) (#168...Benjamin Maxwell
2025-11-20[AArch64][PAC] Use enum to describe LR signing condition (NFC) (#168548)Anatoly Trosinenko
2025-11-20[LLVM][CodeGen][SVE] Only use unpredicated bfloat instructions when all lanes...Paul Walker
2025-11-20[AArch64][SVE] Implement demanded bits for @llvm.aarch64.sve.cntp (#168714)Benjamin Maxwell
2025-11-19CodeGen: Add subtarget to TargetLoweringBase constructor (#168620)Matt Arsenault
2025-11-19[AArch64][GlobalISel] Added support for hadd family of intrinsics (#163985)Joshua Rodriguez
2025-11-19[llvm] Use llvm::size (NFC) (#168675)Kazu Hirata
2025-11-19[AArch64] Update zero latency instructions in Neoverse scheduling tables (#16...Simon Wallis
2025-11-19[AArch64] match TRN starting from undef elements (#167955)Philip Ginsbach-Chen
2025-11-19[AArch64][GlobalISel] Check unmergeSrc is a vector in matchCombineBuildUnmerg...Ryan Cowan
2025-11-19[TTI] Use MemIntrinsicCostAttributes for getMaskedMemoryOpCost (#168029)Shih-Po Hung
2025-11-18[AArch64] - Improve costing for Identity shuffles for SVE targets. (#165375)Pawan Nirpal
2025-11-18[AArch64] Reorder Comparison Trees to Facilitate CSE (#168064)Marius Kamp
2025-11-18[CGP]: Optimize mul.overflow. (#148343)Hassnaa Hamdi
2025-11-18[LLVM][CodeGen][SVE] Use DUPM for constantfp splats. (#168391)Paul Walker
2025-11-18[AArch64][GlobalISel] Add better basic legalization for llround. (#168427)David Green
2025-11-18[AArch64][llvm] GICv5 instruction `GIC CDEOI` takes no operand (#167322)Jonathan Thackray
2025-11-18[AArch64][SME] Add support for zeroing ZT0 to CommitZASavePseudo (#166360)Benjamin Maxwell
2025-11-17[Arm64EC] Preserve X9 for indirect calls. (#167782)Eli Friedman
2025-11-18[AArch64] Treat COPY between cross-register banks as expensive (#167661)Guy David
2025-11-17[AArch64] Optimize extending loads of small vectors (#163064)Guy David
2025-11-17[AArch64][GlobalISel] Fix vecreduce(zext) fold from illegal types. (#167944)David Green
2025-11-17[CostModel][AArch64] Remove promotion cost for SVE bfloat arith supported wit...Benjamin Maxwell
2025-11-17[AArch64] Allow forcing unrolling of small loops (#167488)Vladi Krapp
2025-11-16[AArch64] Use llvm::any_of (NFC) (#168294)Kazu Hirata
2025-11-16AArch64: Use isUndef instead of checking opcode is UNDEF (#168219)Matt Arsenault
2025-11-16[SelectionDAG] Verify SDTCisVT and SDTCVecEltisVT constraints (#150125)Sergei Barannikov
2025-11-15[AArch64] Move AArch64SMEAttributes out of Utils library to fix layering. NFC...Craig Topper
2025-11-15Cleanups in AArch64 (#168025)Eric Christopher
2025-11-14[AArch64][GlobalISel] Improve lowering of vector fp16 fpext (#165554)Ryan Cowan
2025-11-14[AArch64][FEAT_CMPBR] Codegen for Armv9.6-a CBB and CBH (#164899)David Tellenbach
2025-11-14[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)Shubham Sandeep Rastogi
2025-11-14AArch64: rewrite the CSR compuation (#167967)Saleem Abdulrasool
2025-11-14[AArch64] Use isAllOnes rather than popcount() == Size (NFC) (#167884)AZero13
2025-11-14[AArch64] Remove FEAT_TME assembly and ACLE support (#167687)Jonathan Thackray
2025-11-14[AArch64][SME] Handle SME state around TLS-descriptor calls (#155608)Benjamin Maxwell
2025-11-14[AArch64][llvm] Add support for Permission Overlay Extension 2 (FEAT_S1POE2) ...Jonathan Thackray
2025-11-13[AArch64] Make the list of outline atomic supported operations explicit (#167...David Green
2025-11-13[AArch64][llvm] Improve writeback reg handling for FEAT_MOPS (#167763)Jonathan Thackray
2025-11-13[GISel][AArch64] Create emitCMP instead of cloning a virtual register (NFC) (...AZero13
2025-11-13[AArch64][SVE] Allow basic use of `target("aarch64.svcount")` with +sve (#16...Benjamin Maxwell
2025-11-13[AArch64] Add SchedReadAdvance to the Neoverse-N3 scheduling model (#167302)Asher Dobrescu
2025-11-13[AArch64] Generalize CSEL a, b, cc, SUBS(SUB(x,y), 0) -> CSEL a, b, cc, SUBS...AZero13
2025-11-13[AArch64] Use SVE fdot for partial.reduce.fadd for NEON types. (#167856)Sander de Smalen
2025-11-13[AArch64] Fix SVE FADDP latency on Neoverse-N3 (#167676)Asher Dobrescu
2025-11-12[AArch64][llvm] Add instructions for FEAT_MOPS_GO (#164913)Jonathan Thackray
2025-11-12CodeGen: Remove target hook for terminal rule (#165962)Matt Arsenault
2025-11-12[LLVM][CodeGen][SVE] Use BFMLALB for promoted bfloat fma operations. (#167340)Paul Walker
2025-11-12[AArch64][SME] Enable split SVE for hazard padding in SVE CC functions (#166561)Benjamin Maxwell
2025-11-12[AArch64] Prioritize regalloc hints over movprfx hints (#167480)Sander de Smalen
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