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path: root/llvm/test/CodeGen/AMDGPU/frem.ll
AgeCommit message (Expand)Author
2025-10-23[AMDGPU][test] Remove unsafe-fp-math uses (NFC) (#164609)paperchalice
2025-10-20expand-fp: Refactor modification status handling (NFC) (#163542)Frederik Harwath
2025-10-17[AMDGPU][True16][CodeGen] S_PACK_XX_B32_B16 lowering for true16 mode (#162389)Brox Chen
2025-10-13[AMDGPU] expand-fp: unify scalarization (NFC) (#158588)Frederik Harwath
2025-09-24[AMDGPU][True16][CodeGen] true16 isel pattern for fma_mix_f16/bf16 (#159648)Brox Chen
2025-09-09[AMDGPU][True16][CodeGen] update isel pattern with vgpr16 for 16 bit types (#...Brox Chen
2025-09-03[AMDGPU] Implement IR expansion for frem instruction (#130988)Frederik Harwath
2025-08-22[AMDGPU] canCreateUndefOrPoisonForTargetNode - BFE_I32/U32 can't create poiso...Simon Pilgrim
2025-07-23[RFC][NFC][AMDGPU] Remove `-verify-machineinstrs` from `llvm/test/CodeGen/AMD...Shilei Tian
2025-07-09[AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (#144819)Brox Chen
2025-06-10[AMDGPU][True16][CodeGen] v_s_xxx_f16 t16 mode handling in movetoVALU process...Brox Chen
2025-06-04[AMDGPU][True16][CodeGen] legalize 16bit and 32bit use-def chain for moveToVA...Brox Chen
2025-05-05[AMDGPU][True16][CodeGen] optimize codegen for mad-mix in true16 (#124995)Brox Chen
2025-04-23[AMDGPU][True16][CodeGen] update GFX11Plus codegen test with true16 flag (#13...Brox Chen
2025-04-10Reapply [AMDGPU] SIFixSgprCopies should not process twice VGPR to SGPR copies...alex-t
2025-04-10Revert "[AMDGPU] SIFixSgprCopies should not process twice VGPR to SGPR copies...Nico Weber
2025-04-10[AMDGPU] SIFixSgprCopies should not process twice VGPR to SGPR copies inserte...alex-t
2025-03-18AMDGPU: Move insertion into V2SCopies map (#130776)Matt Arsenault
2024-11-08Reapply "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#...Shilei Tian
2024-11-08Revert "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#1...Shilei Tian
2024-11-08[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#112403)Shilei Tian
2024-10-21[AMDGPU] Skip VGPR deallocation for waveslot limited kernels (#112765)Stanislav Mekhanoshin
2024-10-08[AMDGPU] Adopt new lowering sequence for `fdiv16` (#109295)Shilei Tian
2024-07-15Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and fol...Matt Arsenault
2024-07-14Revert "AMDGPU: Move attributor into optimization pipeline (#83131)" and foll...dyung
2024-07-14AMDGPU: Move attributor into optimization pipeline (#83131)Matt Arsenault
2024-01-16[AMDGPU,test] Change llc -march= to -mtriple= (#75982)Fangrui Song
2023-10-09Revert "[CodeGen] Really renumber slot indexes before register allocation (#6...Jay Foad
2023-10-09[CodeGen] Really renumber slot indexes before register allocation (#67038)Jay Foad
2023-09-26[AMDGPU] Fix passing CodeGen/AMDGPU/frem.ll on gfx1150. (#67425)Ivan Kosarev
2023-07-19[AMDGPU] Insert s_nop before s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)Jay Foad
2023-07-13[AMDGPU] Use V_FMA_MIX* more oftenMateja Marjanovic
2022-12-19[AMDGPU] Convert some tests to opaque pointers (NFC)Nikita Popov
2022-09-15[AMDGPU] Always select s_cselect_b32 for uniform 'select' SDNodeAlexander Timofeev
2022-07-08[AMDGPU] Add GFX11 test coverageJay Foad
2022-06-16[AMDGPU] Change use null for dead sdst to be gfx1030+David Stuttard
2022-06-13[AMDGPU] Use null for dead sdst operandStanislav Mekhanoshin
2022-05-18[AMDGPU] Aggressively fold immediates in SIShrinkInstructionsJay Foad
2022-05-18[AMDGPU] Aggressively fold immediates in SIFoldOperandsJay Foad
2021-09-21[AMDGPU] Prefer fmac over fma when selecting FMA_W_CHAINJay Foad
2021-09-21[AMDGPU] Prefer v_fmac over v_fma only when no source modifiers are usedJay Foad
2021-09-14RegAllocGreedy: Account for reserved registers in num regs heuristicMatt Arsenault
2021-09-14[AMDGPU] Switch PostRA sched to MachineSchedJoe Nash
2021-05-24Revert "[NFC] remove explicit default value for strboolattr attribute in tests"serge-sans-paille
2021-05-24[NFC] remove explicit default value for strboolattr attribute in testsserge-sans-paille
2021-05-12[AMDGPU] Improve Codegen for build_vectorJulien Pagès
2021-04-26[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impactsBaptiste Saleil
2021-03-29[AMDGPU] Extend gfx10 test coverage. NFC.Petar Avramovic
2021-01-26[AMDGPU] Update subtarget features for new target ID supportAustin Kerbow
2021-01-21AMDGPU: Use more accurate fast f64 fdivMatt Arsenault
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