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path: root/llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
AgeCommit message (Expand)Author
2025-10-22[AMDGPU] Reland "Remove redundant s_cmp_lg_* sX, 0" (#164201)LU-JOHN
2025-10-18Revert "[AMDGPU] Remove redundant s_cmp_lg_* sX, 0 " (#164116)Jan Patrick Lehr
2025-10-18[AMDGPU] Remove redundant s_cmp_lg_* sX, 0 (#162352)LU-JOHN
2025-07-23[RFC][NFC][AMDGPU] Remove `-verify-machineinstrs` from `llvm/test/CodeGen/AMD...Shilei Tian
2025-06-05MachineScheduler: Improve instruction clustering (#137784)Ruiling, Song
2025-05-28MachineScheduler: Reset next cluster candidate for each node (#139513)Ruiling, Song
2025-05-16[AMDGPU] Do not promote uniform i16 operations to i32 in CGP (#140208)Pierre van Houtryve
2025-05-05[AMDGPU] SIPeepholeSDWA: Handle V_CNDMASK_B32_e64 (#137930)Frederik Harwath
2025-04-10Reapply [AMDGPU] SIFixSgprCopies should not process twice VGPR to SGPR copies...alex-t
2025-04-10Revert "[AMDGPU] SIFixSgprCopies should not process twice VGPR to SGPR copies...Nico Weber
2025-04-10[AMDGPU] SIFixSgprCopies should not process twice VGPR to SGPR copies inserte...alex-t
2025-03-18AMDGPU: Move insertion into V2SCopies map (#130776)Matt Arsenault
2025-03-17[AMDGPU] Add identity_combines to RegBankCombiner (#131305)Pierre van Houtryve
2025-03-13AMDGPU: Replace ptr addrspace(1) undefs with poison (#130900)Matt Arsenault
2024-11-08Reapply "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#...Shilei Tian
2024-11-08Revert "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#1...Shilei Tian
2024-11-08[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#112403)Shilei Tian
2024-09-19[AMDGPU] Promote uniform ops to I32 in DAGISel (#106383)Pierre van Houtryve
2024-07-25[GlobalIsel] Push cast through select. (#100539)Thorsten Schütt
2024-07-23[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)Christudasan Devadasan
2024-07-15Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and fol...Matt Arsenault
2024-07-14Revert "AMDGPU: Move attributor into optimization pipeline (#83131)" and foll...dyung
2024-07-14AMDGPU: Move attributor into optimization pipeline (#83131)Matt Arsenault
2024-07-08[LegalizeDAG] Optimize CodeGen for `ISD::CTLZ_ZERO_UNDEF` (#83039)Manish Kausik H
2024-05-20[AMDGPU] Fix error in #88512. (#92770)Leon Clark
2024-05-19[AMDGPU] Use LSH for lowering ctlz_zero_undef.i8/i16 (#88512)Leon Clark
2024-05-08AMDGPU: Add some more ctlz_zero_undef testsMatt Arsenault
2024-02-29[AMDGPU] Fix OpenCL conformance test failures for ctlz. (#83170)Leon Clark
2024-01-19[AMDGPU] Remove unnecessary add instructions in ctlz.i8 (#77615)Leon Clark
2024-01-16[AMDGPU,test] Change llc -march= to -mtriple= (#75982)Fangrui Song
2023-12-25[LLVM] Make use of s_flbit_i32_b64 and s_ff1_i32_b64 (#75158)Acim Maravic
2022-11-29AMDGPU: Convert some bit operation tests to opaque pointersMatt Arsenault
2022-11-16[AMDGPU][GISel] Smaller code for scalar 32 to 64-bit extensionsJay Foad
2022-07-30[AMDGPU] Extend SILoadStoreOptimizer to s_load instructionsCarl Ritson
2021-12-01[AMDGPU] Set most sched model resource's BufferSize to oneAustin Kerbow
2021-09-16[GlobalISel] Add a combine for and(load , mask) -> zextloadKonstantin Schwarz
2021-08-06[AMDGPU][GlobalISel] Improve regbankselect for 64-bit VGPR ctlz_zero_undef/ct...Jay Foad
2021-08-05[AMDGPU][SDag] Better lowering for 64-bit ctlz/cttzJay Foad
2021-08-05[AMDGPU] Add globalisel checks for ctlz_zero_undef/cttz_zero_undefJay Foad
2021-08-05[AMDGPU] Generate checks for ctlz_zero_undef/cttz_zero_undefJay Foad
2020-08-09Fix 64-bit copy to SCCPiotr Sobczak
2020-06-25[AMDGPU] Select s_cselectPiotr Sobczak
2020-06-24Revert "[AMDGPU] Enable compare operations to be selected by divergence"Matt Arsenault
2020-06-24[AMDGPU] Enable compare operations to be selected by divergencealex-t
2020-06-19Revert "[AMDGPU] Select s_cselect"Piotr Sobczak
2020-06-19[AMDGPU] Select s_cselectPiotr Sobczak
2020-02-10AMDGPU: Move R600 test compatability hackMatt Arsenault
2018-09-11[AMDGPU] Preliminary patch for divergence driven instruction selection. Immed...Alexander Timofeev
2018-06-26AMDGPU: Add pass to lower kernel arguments to loadsMatt Arsenault
2017-11-20[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/su...Dmitry Preobrazhensky
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