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path: root/llvm/test/CodeGen/AMDGPU/ctlz.ll
AgeCommit message (Expand)Author
2025-07-23[RFC][NFC][AMDGPU] Remove `-verify-machineinstrs` from `llvm/test/CodeGen/AMD...Shilei Tian
2025-05-16[AMDGPU] Do not promote uniform i16 operations to i32 in CGP (#140208)Pierre van Houtryve
2025-04-23[AMDGPU][True16][CodeGen] update GFX11Plus codegen test with true16 flag (#13...Brox Chen
2025-01-22[AMDGPU] Add commute for some VOP3 inst (#121326)Shoreshen
2024-11-08Reapply "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#...Shilei Tian
2024-11-08Revert "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#1...Shilei Tian
2024-11-08Recommit "[GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, ...Craig Topper
2024-11-08[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#112403)Shilei Tian
2024-11-06Revert "[GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C...Craig Topper
2024-11-04[GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (#114309)Craig Topper
2024-10-21[AMDGPU] Skip VGPR deallocation for waveslot limited kernels (#112765)Stanislav Mekhanoshin
2024-09-11[GlobalIsel] Combine trunc of binop (#107721)Thorsten Schütt
2024-07-25[GlobalIsel] Push cast through select. (#100539)Thorsten Schütt
2024-07-23[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)Christudasan Devadasan
2024-07-15Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and fol...Matt Arsenault
2024-07-14Revert "AMDGPU: Move attributor into optimization pipeline (#83131)" and foll...dyung
2024-07-14AMDGPU: Move attributor into optimization pipeline (#83131)Matt Arsenault
2024-02-29[AMDGPU] Fix OpenCL conformance test failures for ctlz. (#83170)Leon Clark
2024-01-19[AMDGPU] Remove unnecessary add instructions in ctlz.i8 (#77615)Leon Clark
2024-01-16[AMDGPU,test] Change llc -march= to -mtriple= (#75982)Fangrui Song
2023-12-25[LLVM] Make use of s_flbit_i32_b64 and s_ff1_i32_b64 (#75158)Acim Maravic
2023-07-19[AMDGPU] Insert s_nop before s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)Jay Foad
2022-11-29AMDGPU: Convert some bit operation tests to opaque pointersMatt Arsenault
2022-11-16[AMDGPU][GISel] Smaller code for scalar 32 to 64-bit extensionsJay Foad
2022-07-30[AMDGPU] Extend SILoadStoreOptimizer to s_load instructionsCarl Ritson
2022-07-08[AMDGPU] Add GFX11 test coverageJay Foad
2022-05-18[AMDGPU] Aggressively fold immediates in SIFoldOperandsJay Foad
2021-12-01[AMDGPU] Set most sched model resource's BufferSize to oneAustin Kerbow
2021-09-16[GlobalISel] Add a combine for and(load , mask) -> zextloadKonstantin Schwarz
2021-08-25[AMDGPU] Divergence-driven compare operations instruction selectionalex-t
2021-08-06[AMDGPU][GlobalISel] Better legalization of 32-bit ctlz/cttzJay Foad
2021-08-06[AMDGPU][GlobalISel] Improve regbankselect for 64-bit VGPR ctlz_zero_undef/ct...Jay Foad
2021-08-05[AMDGPU][SDag] Better lowering for 32-bit ctlz/cttzJay Foad
2021-08-05[AMDGPU][SDag] Better lowering for 64-bit ctlz/cttzJay Foad
2021-08-04[AMDGPU] Add cttz tests and globalisel checks for ctlzJay Foad
2021-04-26[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impactsBaptiste Saleil
2021-04-01[AMDGPU][MC][GFX10][GFX90A] Corrected _e32/_e64 sufficesDmitry Preobrazhensky
2021-03-29[AMDGPU] Extend gfx10 test coverage. NFC.Petar Avramovic
2021-01-26[AMDGPU] Update subtarget features for new target ID supportAustin Kerbow
2021-01-05[NFC] Removed unused prefixes in test/CodeGen/AMDGPUMircea Trofin
2020-10-20[AMDGPU] Optimize waitcnt insertion for flat memory operationsTony
2020-08-09Fix 64-bit copy to SCCPiotr Sobczak
2020-07-17[MachineScheduler] Fix the TopDepth/BotHeightReduce latency heuristicsJay Foad
2020-06-25[AMDGPU] Select s_cselectPiotr Sobczak
2020-06-24Revert "[AMDGPU] Enable compare operations to be selected by divergence"Matt Arsenault
2020-06-24[AMDGPU] Enable compare operations to be selected by divergencealex-t
2020-06-19Revert "[AMDGPU] Select s_cselect"Piotr Sobczak
2020-06-19[AMDGPU] Select s_cselectPiotr Sobczak
2020-02-28[AMDGPU] Remove dubious logic in bidirectional list schedulerJay Foad
2020-02-10AMDGPU: Move R600 test compatability hackMatt Arsenault
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