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path: root/llvm/test/CodeGen/AMDGPU/call-argument-types.ll
AgeCommit message (Expand)Author
2025-11-07[NFC][AMDGPU][GISel] Precommit GlobalISel specific tests for call instruction...Chinmay Deshpande
2025-11-06Reland: CodeGen: Record MMOs in finalizeBundle (#166689)Nicolai Hähnle
2025-11-05Revert "CodeGen: Record MMOs in finalizeBundle" (#166520)Jan Patrick Lehr
2025-11-05CodeGen: Record MMOs in finalizeBundle (#166210)Nicolai Hähnle
2025-09-26[AMDGPU] Ensure divergence for v_alignbit (#129159)Jeffrey Byrnes
2025-09-16[AMDGPU] Set TGID_EN_X/Y/Z when cluster ID intrinsics are used (#159120)Shilei Tian
2025-08-26AMDGPU: Replace copy-to-mov-imm folding logic with class compat checks (#154501)Matt Arsenault
2025-07-23[RFC][NFC][AMDGPU] Remove `-verify-machineinstrs` from `llvm/test/CodeGen/AMD...Shilei Tian
2025-07-09[AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (#144819)Brox Chen
2025-05-28MachineScheduler: Reset next cluster candidate for each node (#139513)Ruiling, Song
2025-04-24AMDGPU: Remove amdhsa_code_object_version module flags from most tests (#136363)Matt Arsenault
2025-04-23[AMDGPU][True16][CodeGen] update GFX11Plus codegen test with true16 flag (#13...Brox Chen
2025-03-14AMDGPU: Replace ptr addrspace(4) undef uses with poison in tests (#131095)Matt Arsenault
2025-03-13AMDGPU: Replace ptr addrspace(1) undefs with poison (#130900)Matt Arsenault
2025-03-12AMDGPU: Replace tests using undef in shufflevector with poison (#130899)Matt Arsenault
2025-03-08[AMDGPU] Change SGPR layout to striped caller/callee saved (#127353)Shilei Tian
2025-02-22PeepholeOpt: Allow introducing subregister uses on reg_sequence (#127052)Matt Arsenault
2025-02-01[MachineScheduler] Fix physreg dependencies of ExitSU (#123541)Sergei Barannikov
2025-01-24[AMDGPU] Restore SP from saved-FP or saved-BP (#124007)Aaditya
2024-11-08Reapply "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#...Shilei Tian
2024-11-08Revert "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#1...Shilei Tian
2024-11-08[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#112403)Shilei Tian
2024-03-06[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)Emma Pilkington
2024-02-09Revert "[AMDGPU] Compiler should synthesize private buffer resource descripto...Jan Patrick Lehr
2024-02-09[AMDGPU] Don't fix the scavenge slot at offset 0 (#79136)Diana Picus
2024-02-08[AMDGPU] Compiler should synthesize private buffer resource descriptor from f...alex-t
2024-01-11[AMDGPU] Don't send DEALLOC_VGPRs after calls (#77439)Diana Picus
2023-12-12[AMDGPU][NFC] Test autogenerated llc tests for COV5 (#74339)Saiyedul Islam
2023-09-12Revert "[AMDGPU] Make default AMDHSA Code Object Version to be 5 (#65410)" (#...Saiyedul Islam
2023-09-12[AMDGPU] Make default AMDHSA Code Object Version to be 5 (#65410)Saiyedul Islam
2023-09-11[test] Change llc -march= to -mtriple=Fangrui Song
2023-07-31Reapply "[CodeGen]Allow targets to use target specific COPY instructions for ...Matt Arsenault
2023-07-26Revert "[CodeGen]Allow targets to use target specific COPY instructions for l...Vitaly Buka
2023-07-19[AMDGPU] Insert s_nop before s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)Jay Foad
2023-07-07[AMDGPU][SILowerSGPRSpills] Spill SGPRs to virtual VGPRsChristudasan Devadasan
2023-07-04[AMDGPU] Do not wait for vscnt on function entry and returnJay Foad
2023-06-19[AMDGPU] Reimplement the GFX11 early release VGPRs optimizationJay Foad
2023-06-15[AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 9.Ivan Kosarev
2023-02-09[SelectionDAG] Do not second-guess alignment for allocaAndrew Savonichev
2022-12-15Revert "[SelectionDAG] Do not second-guess alignment for alloca"Ron Lieberman
2022-12-15[SelectionDAG] Do not second-guess alignment for allocaAndrew Savonichev
2022-11-29AMDGPU: Bulk update some call tests to use opaque pointersMatt Arsenault
2022-02-18[CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC.Jay Foad
2021-12-04AMDGPU: Enable fixed function ABI by defaultMatt Arsenault
2021-12-01[AMDGPU] Set most sched model resource's BufferSize to oneAustin Kerbow
2021-08-26AMDGPU: Fix hardcoded registers in testMatt Arsenault
2021-08-26AMDGPU: Remove unnecessary -NEXT checksMatt Arsenault
2021-05-18[TargetLowering] Only inspect attributes in the arguments for ArgListEntryArthur Eubanks
2021-05-16Revert "[TargetLowering] Only inspect attributes in the arguments for ArgList...Arthur Eubanks
2021-05-14[AMDGPU] getMemOperandsWithOffset: add vaddr operand for stack access BUF ins...Jay Foad
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