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path: root/llvm/lib/Target/SystemZ/SystemZInstrInfo.td
AgeCommit message (Expand)Author
2025-03-25[SystemZ] Implement basic `isCopyInstrImpl` (#132903)Dominik Steenken
2025-03-04[SystemZ] Make I5 operand of R[INOX]SGB(Z)? optional (#129512)Dominik Steenken
2025-03-03[SystemZ] Change operand type for CKSM intrstruction. (#129572)Kai Nacke
2025-01-20[SystemZ] Add support for new cpu architecture - arch15Ulrich Weigand
2024-12-14[TableGen][SystemZ] Correctly check the range of a leaf immediate (#119931)Sergei Barannikov
2024-12-10SystemZ: Add support for __builtin_setjmp and __builtin_longjmp. (#119257)anoopkg6
2024-12-07Revert "[SystemZ] Add support for __builtin_setjmp and __builtin_longjmp (#11...Ulrich Weigand
2024-12-06[SystemZ] Add support for __builtin_setjmp and __builtin_longjmp (#116642)anoopkg6
2024-12-03[SystemZ] Use nop mnemonics for disassemblyUlrich Weigand
2024-10-18[SystemZ] Rename SystemZ ATT Asm dialect to GNU Asm dialect (#112800)tltao
2024-08-01[SystemZ][z/OS] Fix incorrect codegen for ADA_ENTRY pseudo instruction (#101415)tltao
2024-07-15Add extended mnemonics (#97571)Dominik Steenken
2024-06-13DAG: Replace bitwidth with type in suffix in atomic tablegen ops (#94845)Matt Arsenault
2024-03-28[SystemZ] Eliminate call sequence instructions early. (#77812)Jonas Paulsson
2024-03-18[SystemZ] Don't lower ATOMIC_LOAD/STORE to LOAD/STORE (#75879)Jonas Paulsson
2023-12-11[SystemZ] Use LCGR/AGHI for i64 XOR with -1 (#74882)Jonas Paulsson
2023-12-08[SystemZ] Simplify handling of AtomicRMW instructions. (#74789)Jonas Paulsson
2023-07-14[SystemZ] Use named MI sub-operandsIlya Leoshkevich
2023-07-05[SystemZ][z/OS] z/OS ADA codegen and emissionYusra Syeda
2023-06-28Revert "[SystemZ][z/OS] This patch adds support for the ADA (associated data ...Yusra Syeda
2023-06-28[SystemZ][z/OS] This patch adds support for the ADA (associated data area), d...Yusra Syeda
2023-04-02[Targets] Rename Flag->Glue. NFCCraig Topper
2023-01-11[CodeGen] Introduce a generic MEMBARRIER instruction [mostly-nfc]Philip Reames
2023-01-09[SDAG] Introduce a common MEMBARRIER node [nfc]Philip Reames
2022-02-25[SystemZ] [z/OS] Add support for generating huge (1 MiB) stack frames in XPLI...Neumann Hon
2022-02-11[SystemZ/z/OS] Add alias for XPLINK returnKai Nacke
2021-12-06[SystemZ] Improve codegen for memset.Jonas Paulsson
2021-10-22[SystemZ] Give the EXRL_Pseudo a size value of 6 bytes.Jonas Paulsson
2021-10-14[SystemZ] Bugfix and refactorization of mem-mem operationsJonas Paulsson
2021-07-26[SystemZ] Add support for new cpu architecture - arch14Ulrich Weigand
2021-07-06[SystemZ] Generate XC loop for memset 0 of variable length.Jonas Paulsson
2021-03-01[SystemZ] Introduce distinction between the jg/jl family of mnemonics for GNU...Anirudh Prasad
2021-02-19[SystemZ/z/OS] Add XPLINK 64-bit calling convention to tablegen.Yusra Syeda
2021-02-17[SystemZ] Separate LoZ ELF specifics in tablegen.Yusra Syeda
2020-12-15[SystemZ] Remove most hard-coded R1D instances for sibcallsUlrich Weigand
2020-12-02[SystemZ] Adding extra extended mnemonics for SystemZ targetAnirudh Prasad
2020-11-18[SystemZ] Use ISD::ABS opcode during isel.Jonas Paulsson
2020-10-05[SystemZ] Add support for .insn directives for vector instructions.Jonas Paulsson
2020-09-30[SystemZ] Support bare nop instructionsJonas Paulsson
2020-06-06[SystemZ] Implement -fstack-clash-protectionJonas Paulsson
2020-03-31[SystemZ] Improve foldMemoryOperandImpl().Jonas Paulsson
2020-03-10[SystemZ] Improve foldMemoryOperandImpl().Jonas Paulsson
2019-12-20[SystemZ] Add a mapping from "select register" to "load on condition" (2-addr).Jonas Paulsson
2019-12-20[SystemZ] Bugfix and improve the handling of CC values.Jonas Paulsson
2019-11-26[SystemZ] Don't build a PPA instruction with an immediate 0 operand.Jonas Paulsson
2019-09-13DAG/GlobalISel: Correct type profile of bitcount opsMatt Arsenault
2019-09-12Rename nonvolatile_load/store to simple_load/store [NFC]Philip Reames
2019-07-12[SystemZ] Add support for new cpu architecture - arch13Ulrich Weigand
2019-06-08[SystemZ, RegAlloc] Favor 3-address instructions during instruction selection.Jonas Paulsson
2019-05-13[SystemZ] Model floating-point control registerUlrich Weigand