| Age | Commit message (Expand) | Author |
|---|
| 2025-09-12 | CodeGen: Remove MachineFunction argument from getPointerRegClass (#158185) | Matt Arsenault |
| 2024-11-03 | [SPARC] Allow overaligned `alloca`s (#107223) | Koakuma |
| 2024-02-11 | [SPARC] Support reserving arbitrary general purpose registers (#74927) | Koakuma |
| 2022-11-18 | PEI should be able to use backward walk in replaceFrameIndicesBackward. | Alexander Timofeev |
| 2020-11-05 | [SVE] Return StackOffset for TargetFrameLowering::getFrameIndexReference. | Sander de Smalen |
| 2020-04-07 | CodeGen: Use Register in TargetFrameLowering | Matt Arsenault |
| 2019-08-15 | Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM | Daniel Sanders |
| 2019-06-24 | CodeGen: Introduce a class for registers | Matt Arsenault |
| 2019-04-15 | [Sparc] Fix typo. NFC. | Jim Lin |
| 2019-04-10 | [Sparc] Fix incorrect MI insertion position for spilling f128. | Jim Lin |
| 2019-01-19 | Update the file headers across all of the LLVM projects in the monorepo | Chandler Carruth |
| 2018-08-27 | [Sparc] Add support for the cycle counter available in GR740 | Daniel Cederman |
| 2017-11-08 | Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering | David Blaikie |
| 2016-06-12 | Pass DebugLoc and SDLoc by const ref. | Benjamin Kramer |
| 2015-08-21 | [Sparc] Support user-specified stack object overalignment. | James Y Knight |
| 2015-08-10 | [Sparc] Implement i64 load/store support for 32-bit sparc. | James Y Knight |
| 2015-03-12 | Remove the need to cache the subtarget in the Sparc TargetRegisterInfo | Eric Christopher |
| 2015-03-11 | Have getCallPreservedMask and getThisCallPreservedMask take a | Eric Christopher |
| 2014-08-05 | Have MachineFunction cache a pointer to the subtarget to make lookups | Eric Christopher |
| 2014-08-04 | Remove the TargetMachine forwards for TargetSubtargetInfo based | Eric Christopher |
| 2014-04-22 | [cleanup] Lift using directives, DEBUG_TYPE definitions, and even some | Chandler Carruth |
| 2014-04-04 | Make consistent use of MCPhysReg instead of uint16_t throughout the tree. | Craig Topper |
| 2014-02-01 | [Sparc] Set %o7 as the return address register instead of %i7 in MCRegisterIn... | Venkatraman Govindaraju |
| 2013-11-24 | [Sparc] Emit large negative adjustments to SP/FP with sethi+xor instead of se... | Venkatraman Govindaraju |
| 2013-10-07 | Remove getEHExceptionRegister and getEHHandlerRegister. | Rafael Espindola |
| 2013-09-05 | [Sparc] Correctly handle call to functions with ReturnsTwice attribute. | Venkatraman Govindaraju |
| 2013-09-02 | [Sparc] Implement spill and load for long double(f128) registers. | Venkatraman Govindaraju |
| 2013-08-25 | [Sparc] Added V9's extra floating point registers and their aliases. | Venkatraman Govindaraju |
| 2013-08-23 | Add an OtherPreserved field to the CalleeSaved TableGen class. | Jakob Stoklund Olesen |
| 2013-06-07 | Don't cache the instruction and register info from the TargetMachine, because | Bill Wendling |
| 2013-06-04 | Sparc: No functionality change. Cleanup whitespaces, comment formatting etc., | Venkatraman Govindaraju |
| 2013-06-01 | [Sparc] Generate correct code for leaf functions with stack objects | Venkatraman Govindaraju |
| 2013-05-29 | [Sparc] Add support for leaf functions in sparc backend. | Venkatraman Govindaraju |
| 2013-05-19 | [Sparc] Rearrange integer registers' allocation order so that register alloca... | Venkatraman Govindaraju |
| 2013-04-06 | SPARC v9 stack pointer bias. | Jakob Stoklund Olesen |
| 2013-04-02 | Add an I64Regs register class for 64-bit registers. | Jakob Stoklund Olesen |
| 2013-02-21 | Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo | Eli Bendersky |
| 2013-01-31 | [PEI] Pass the frame index operand number to the eliminateFrameIndex function. | Chad Rosier |
| 2013-01-02 | Move all of the header files which are involved in modelling the LLVM IR | Chandler Carruth |
| 2012-12-03 | Use the new script to sort the includes of every file under lib. | Chandler Carruth |
| 2012-08-06 | Remove empty overrides of processFunctionBeforeFrameFinalized(). | Roman Divacky |
| 2012-03-17 | Reorder includes in Target backends to following coding standards. Remove som... | Craig Topper |
| 2012-03-04 | Use uint16_t to store registers in callee saved register tables to reduce siz... | Craig Topper |
| 2012-02-18 | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu |
| 2012-01-20 | More dead code removal (using -Wunreachable-code) | David Blaikie |
| 2011-07-18 | Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for | Evan Cheng |
| 2011-07-18 | Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down | Evan Cheng |
| 2011-07-14 | Next round of MC refactoring. This patch factor MC table instantiations, MC | Evan Cheng |
| 2011-06-28 | Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. | Evan Cheng |
| 2011-06-28 | Hide more details in tablegen generated MCRegisterInfo ctor function. | Evan Cheng |
