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path: root/llvm/lib/Target/PowerPC/Disassembler
AgeCommit message (Expand)Author
2025-09-19PPC: Replace PointerLikeRegClass with RegClassByHwMode (#158777)Matt Arsenault
2025-09-15[NFC][DecoderEmitter] Code cleanup in `DecoderEmitter::emitTable` (#158014)Rahul Joshi
2025-08-21[NFC][MC][Decoder] Extract fixed pieces of decoder code into new header file ...Rahul Joshi
2025-06-17[llvm] annotate interfaces in llvm/Target for DLL export (#143615)Andrew Rogers
2023-05-24[PowerPC] Remove asserts from the disassembler.Stefan Pintilie
2023-05-01[PowerPC] Implement DFP add and sub instructions.Stefan Pintilie
2023-02-17Simplify with hasFeature. NFCFangrui Song
2023-02-02[PowerPC] Switch to by-name matching for instructions (part 2 of 2).James Y Knight
2023-02-02[PowerPC] Don't crash when disassembling invalid immediateNemanja Ivanovic
2023-01-28[Target] Use llvm::count{l,r}_{zero,one} (NFC)Kazu Hirata
2022-12-13[NFC][CMake] Explicitly link to MC when neededRoman Lebedev
2022-11-03[PowerPC] Add new DMR register classes to Future CPU.Stefan Pintilie
2022-05-15Rename `MCFixedLenDisassembler.h` as `MCDecoderOps.h`Sheng
2022-03-25[Disassember][NFCI] Use strong type for instruction decoderMaksim Panchenko
2021-10-08Move TargetRegistry.(h|cpp) from Support to MCReid Kleckner
2021-06-15[PowerPC] Export 16 byte load-store instructionsKai Luo
2021-04-15[PowerPC] Add ROP Protection Instructions for PowerPCStefan Pintilie
2021-04-09Revert "[PowerPC] Add ROP Protection Instructions for PowerPC"Mitch Phillips
2021-04-09[PowerPC] Add ROP Protection Instructions for PowerPCStefan Pintilie
2021-01-02[PowerPC] Add the LLVM triple for powerpcle [1/5]Brandon Bergren
2020-11-13llvmbuildectomy - replace llvm-build by plain cmakeserge-sans-paille
2020-09-30[PowerPC] Add outer product instructions for MMAAhsan Saghir
2020-09-25[PowerPC] Add accumulator register class and instructionsBaptiste Saleil
2020-09-21[PowerPC] Add vector pair load/store instructions and vector pair register classBaptiste Saleil
2020-07-28Re-land "[PowerPC] Remove QPX/A2Q BGQ/BGP CNK support"Jinsong Ji
2020-07-27Revert "[PowerPC] Remove QPX/A2Q BGQ/BGP CNK support"Jinsong Ji
2020-07-27[PowerPC] Remove QPX/A2Q BGQ/BGP CNK supportJinsong Ji
2020-04-01[PPCInstPrinter] Change B to print the target address in hexadecimal formFangrui Song
2020-03-31[PPCInstPrinter] Print conditional branches as `bt 2, $target` instead of `bt...Fangrui Song
2020-01-28[PowerPC][Future] Add pld and pstd to future CPUVictor Huang
2020-01-24[PowerPC][Future] Add prefixed instruction paddi to future CPUVictor Huang
2020-01-14CMake: Make most target symbols hidden by defaultTom Stellard
2020-01-11[Disassembler] Delete the VStream parameter of MCDisassembler::getInstruction()Fangrui Song
2019-11-21[cmake] Explicitly mark libraries defined in lib/ as "Component Libraries"Tom Stellard
2019-09-12[PowerPC] Remove the SPE4RC register class and instead add f32 to the GPRC re...Craig Topper
2019-06-27[PowerPC][HTM] Fix disassembling buffer overflow for tabortdc and othersJinsong Ji
2019-06-11Revert CMake: Make most target symbols hidden by defaultTom Stellard
2019-06-10CMake: Make most target symbols hidden by defaultTom Stellard
2019-05-15[PowerPC] Create a TargetInfo header. NFCRichard Trieu
2019-02-12[PowerPC] Fix printing of negative offsets in call instruction dissasembly.Sean Fertile
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth
2018-12-29[PowerPC][NFC] Macro for register set defs for the Asm ParserNemanja Ivanovic
2018-09-10[Target] Untangle disassemblersBenjamin Kramer
2018-07-18Introduce codegen for the Signal Processing EngineJustin Hibbits
2018-07-18Complete the SPE instruction set patternsJustin Hibbits
2017-05-11[PPC] Change the register constraint of the first source operand of instructi...Guozhi Wei
2016-10-09Move the global variables representing each Target behind accessor functionMehdi Amini
2016-10-04[Power9] Part-word VSX integer scalar loads/stores and sign extend instructionsNemanja Ivanovic
2016-04-28This reverts commit r265505.Kit Barton
2016-04-06[Power9] Implement add-pc, multiply-add, modulo, extend-sign-shift, random nu...Chuang-Yu Cheng
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