summaryrefslogtreecommitdiff
path: root/llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
AgeCommit message (Expand)Author
2025-11-10CodeGen: Keep reference to TargetRegisterInfo in TargetInstrInfo (#158224)Matt Arsenault
2025-09-08CodeGen: Pass SubtargetInfo to TargetGenInstrInfo constructors (#157337)Matt Arsenault
2025-07-31[NVPTX] Cleanup various vestigial elements and fold together more table-gen (...Alex MacLean
2025-06-25[NVPTX] Consolidate and cleanup various NVPTXISD nodes (NFC) (#145581)Alex MacLean
2025-06-23[NVPTX] Rename register classes after float register removal (NFC) (#145255)Alex MacLean
2025-05-21[NVPTX] Remove Float register classes (#140487)Alex MacLean
2025-04-30[NVPTX][NFC] Minor cleanup in NVPTXInstrInfo.td (#138006)Alex MacLean
2025-03-23[NVPTX] cleanup & canonicalize `mov` (#129344)Justin Fargnoli
2025-02-24[CodeGen] Change copyPhysReg interface to use Register instead of MCRegister....Craig Topper
2024-11-18[llvm][NVPTX] Don't reorder MIs that construct a PTX function call (#116522)Youngsuk Kim
2024-11-18[Target] Remove unused includes (NFC) (#116577)Kazu Hirata
2024-08-27[TII][RISCV] Add renamable bit to copyPhysReg (#91179)Piyou Chen
2024-07-01[NVPTX] Support inline asm with 128-bit operand in NVPTX backend (#97113)Chengjunp
2023-06-05Coalesce 16-bit FP types to use integer register classes.Artem Belevich
2022-03-27[Target] Apply clang-tidy fixes for readability-redundant-member-init (NFC)Kazu Hirata
2022-01-03Revert "[llvm] Remove redundant member initialization (NFC)"Kazu Hirata
2022-01-01[llvm] Remove redundant member initialization (NFC)Kazu Hirata
2021-11-03[NVPTX] Copy machine operand flags in TII::insertBranchAndrew Savonichev
2020-01-21Update spelling of {analyze,insert,remove}Branch in strings and commentsKrzysztof Parzyszek
2019-11-11Use MCRegister in copyPhysRegMatt Arsenault
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth
2018-06-28[NVPTX] Delete dead codeBenjamin Kramer
2017-06-06Sort the remaining #include lines in include/... and lib/....Chandler Carruth
2017-04-24Move size and alignment information of regclass to TargetRegisterInfoKrzysztof Parzyszek
2017-02-23[NVPTX] Added support for .f16x2 instructions.Artem Belevich
2017-01-13[NVPTX] Added support for half-precision floating point.Artem Belevich
2016-12-14[NVPTX] Remove dead code.Justin Lebar
2016-09-14Finish renaming remaining analyzeBranch functionsMatt Arsenault
2016-09-14Make analyzeBranch family of instruction names consistentMatt Arsenault
2016-09-14AArch64: Use TTI branch functions in branch relaxationMatt Arsenault
2016-07-15Rename AnalyzeBranch* to analyzeBranch*.Jacques Pienaar
2016-07-08NVPTX: Avoid implicit iterator conversions, NFCDuncan P. N. Exon Smith
2016-07-06NVPTX: Replace uses of cuda.syncthreads with nvvm.barrier0Justin Bogner
2016-06-12Pass DebugLoc and SDLoc by const ref.Benjamin Kramer
2016-02-23CodeGen: TII: Take MachineInstr& in predicate API, NFCDuncan P. N. Exon Smith
2015-10-15[NVPTX] Remove dead code.Benjamin Kramer
2015-08-01[NVPTX] allow register copy between float and intJingyue Wu
2015-06-11[CodeGen] ArrayRef'ize cond/pred in various TII APIs. NFC.Ahmed Bougacha
2015-02-19Remove all use of is64bit off of NVPTXSubtarget and clean up codeEric Christopher
2015-01-14[cleanup] Re-sort all the #include lines in LLVM usingChandler Carruth
2014-06-27Remove caching of the target machine in NVPTXInstrInfo andEric Christopher
2014-04-25[C++] Use 'nullptr'. Target edition.Craig Topper
2014-04-22[cleanup] Lift using directives, DEBUG_TYPE definitions, and even someChandler Carruth
2013-11-19[weak vtables] Remove a bunch of weak vtablesJuergen Ributzka
2013-11-18Revert r194865 and r194874.Alexey Samsonov
2013-11-15[weak vtables] Remove a bunch of weak vtablesJuergen Ributzka
2013-08-18Remove unused stdio.h includesDmitri Gribenko
2013-06-28[NVPTX] Remove i8 register class. PTX support for i8 (.b8, .u8, .s8) is rath...Justin Holewinski
2013-06-19Don't pass in the TargetInstrInfo into the register info object. It doesn't u...Bill Wendling
2013-05-31[NVPTX] Re-enable support for virtual registers in the final outputJustin Holewinski