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path: root/llvm/lib/Target/Mips/MipsInstrInfo.cpp
AgeCommit message (Expand)Author
2025-11-10CodeGen: Keep reference to TargetRegisterInfo in TargetInstrInfo (#158224)Matt Arsenault
2025-09-08CodeGen: Pass SubtargetInfo to TargetGenInstrInfo constructors (#157337)Matt Arsenault
2025-05-14[Mips] Add support of MipsInstrInfo::getNop() (#139863)yingopq
2025-03-28MIPS: Implement isAsCheapAsAMove for addiu (#133273)YunQiang Su
2024-09-23[Mips] Fix mfhi/mflo hazard miscompilation about div and mult (#91449)yingopq
2024-04-24[CodeGen] Make the parameter TRI required in some functions. (#85968)Xu Zhang
2023-01-05Move from llvm::makeArrayRef to ArrayRef deduction guides - llvm/ partserge-sans-paille
2022-12-04[Target] llvm::Optional => std::optionalFangrui Song
2022-12-02[Target] Use std::nullopt instead of None (NFC)Kazu Hirata
2022-10-30[Mips] Fix a warningKazu Hirata
2022-05-11[MIPS] Remove an incorrect microMIPS instruction aliasSimon Dardis
2022-04-07[MIPS] Initial support for MIPS-I load delay slotsSimon Dardis
2022-04-07[mips] Remove stale comment (NFC)Simon Dardis
2022-03-16[NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated ...Shengchen Kan
2021-12-07[MIPS] Add FPU Delay Slot for MIPS1/2/3Djordje Todorovic
2021-01-10[llvm] Ensure newlines at the end of files (NFC)Kazu Hirata
2020-06-22[CSInfo][MIPS] Don't describe parameters loaded by sub/super reg copyDjordje Todorovic
2020-06-04[CSInfo][MIPS] Describe parameter value loaded by ADDiuDjordje Todorovic
2020-03-31[Alignment][NFC] Transitionning more getMachineMemOperand call sitesGuillaume Chatelet
2019-11-03[mips] Split long lines in the code. NFCSimon Atanasyan
2019-09-25[TargetInstrInfo] Let findCommutedOpIndices take const MachineInstr&Simon Pilgrim
2019-02-08Implementation of asm-goto support in LLVMCraig Topper
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth
2019-01-17[mips] Emit .reloc R_{MICRO}MIPS_JALR along with j(al)r(c) $25Vladimir Stefanovic
2018-08-16[MI] Change the array of `MachineMemOperand` pointers to beChandler Carruth
2018-08-07[mips] Handle branch expansion corner casesAleksandar Beserminji
2018-05-16[mips] Add support for isBranchOffsetInRange and use it for MipsLongBranchSimon Dardis
2018-05-09[DebugInfo] Examine all uses of isDebugValue() for debug instructions.Shiva Chen
2018-03-30Fix a bunch of typoes. NFCFangrui Song
2018-02-21[mips] Spectre variant two mitigation for MIPSR2Simon Dardis
2017-12-18Reland "[mips] Fix the target specific instruction verifier"Simon Dardis
2017-12-18Revert "[mips] Fix the target specific instruction verifier"Simon Dardis
2017-12-18[mips] Fix the target specific instruction verifierSimon Dardis
2017-12-11[mips] Removal of microMIPS64R6Aleksandar Beserminji
2017-12-07[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih
2017-11-28[CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih
2017-11-17Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie
2017-10-26[mips] Fix PR35071Simon Dardis
2017-10-18[mips] Fix analyzeBranch to handle debug dataSimon Dardis
2017-10-11[mips] Add support for parsing target specific flags for MIRSimon Dardis
2017-09-14[mips] Pick the right variant of DINS upfront and enable target instruction v...Simon Dardis
2017-08-03[Mips] Fix some Clang-tidy modernize-use-using and Include What You Use warni...Eugene Zelenko
2017-06-13[MIPS] BuildCondBr should preserve MO flagsSimon Dardis
2017-03-31[mips][msa] Prevent output operand from commuting for dpadd_[su].df insPetar Jovanovic
2017-01-13[CodeGen] Rename MachineInstrBuilder::addOperand. NFCDiana Picus
2016-09-14Finish renaming remaining analyzeBranch functionsMatt Arsenault
2016-09-14Make analyzeBranch family of instruction names consistentMatt Arsenault
2016-09-14AArch64: Use TTI branch functions in branch relaxationMatt Arsenault
2016-09-11CodeGen: Give MachineBasicBlock::reverse_iterator a handle to the current MIDuncan P. N. Exon Smith
2016-08-18[mips] Correct tail call encoding for MIPSR6Simon Dardis
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