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path: root/llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
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2025-09-12CodeGen: Remove MachineFunction argument from getPointerRegClass (#158185)Matt Arsenault
2024-12-12CodeGen: Eliminate dynamic relocations in the register superclass tables. (#1...Owen Anderson
2024-12-11Revert "CodeGen: Eliminate dynamic relocations in the register superclass tab...Owen Anderson
2024-12-11CodeGen: Eliminate dynamic relocations in the register superclass tables. (#1...Owen Anderson
2024-11-17[Hexagon] Remove unused includes (NFC) (#116529)Kazu Hirata
2023-05-16[Hexagon] Remove getFirstCallerSavedNonParamRegKazu Hirata
2022-11-18PEI should be able to use backward walk in replaceFrameIndicesBackward.Alexander Timofeev
2022-11-15[Hexagon] Adjust handling of stack with variable-size and extra alignmentKrzysztof Parzyszek
2022-11-13[Hexagon] Use `Register` instead of `unsigned`, NFCKrzysztof Parzyszek
2022-11-13[Hexagon] Remove unneeded HexagonRegisterInfo::getRARegisterKrzysztof Parzyszek
2022-08-08[llvm] LLVM_FALLTHROUGH => [[fallthrough]]. NFCFangrui Song
2022-03-16[NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated ...Shengchen Kan
2021-03-25[Hexagon] Limit virtual register reuse range in FI eliminationKrzysztof Parzyszek
2021-03-17[Hexagon] Improve stack address base reuse for HVX spillsKrzysztof Parzyszek
2020-11-05[SVE] Return StackOffset for TargetFrameLowering::getFrameIndexReference.Sander de Smalen
2020-04-07CodeGen: Use Register in TargetFrameLoweringMatt Arsenault
2020-02-14[Hexagon] v67+ HVX register pairs should support either directionBrian Cain
2019-11-12[Hexagon] Fix vector spill expansion to use proper alignmentKrzysztof Parzyszek
2019-08-15Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders
2019-06-24CodeGen: Introduce a class for registersMatt Arsenault
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth
2018-12-05[Hexagon] Foundation of support for Hexagon V66Krzysztof Parzyszek
2018-10-19[Hexagon] Remove support for V4Krzysztof Parzyszek
2018-07-13[Hexagon] Avoid introducing calls into coalesced range of HVX vector pairsKrzysztof Parzyszek
2018-03-01[Hexagon] Add guest registersKrzysztof Parzyszek
2018-02-28[Hexagon] Implement target feature +reserved-r19Krzysztof Parzyszek
2018-02-21[Hexagon] Add TargetRegisterInfo::getPointerRegClass() overrideTobias Edler von Koch
2017-12-11[Hexagon] Add support for Hexagon V65Krzysztof Parzyszek
2017-11-08Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie
2017-10-18[Hexagon] Update Hexagon ArchEnum and sync some downstream changes(NFC)Sumanth Gundapaneni
2017-09-25[Hexagon] Make getHexagonSubRegIndex take reference instead of pointerKrzysztof Parzyszek
2017-09-15[Hexagon] Switch to parameterized register classes for HVXKrzysztof Parzyszek
2017-06-23Revert "[Hexagon] Handle decreasing of stack alignment in frame lowering"Krzysztof Parzyszek
2017-06-23[Hexagon] Handle decreasing of stack alignment in frame loweringKrzysztof Parzyszek
2017-05-26[Hexagon] Cleanup of unused function isCalleeSaveReg (NFC)Sumanth Gundapaneni
2017-02-22[Hexagon] Implement @llvm.readcyclecounter()Krzysztof Parzyszek
2017-02-17[Hexagon] Start using regmasks on callsKrzysztof Parzyszek
2017-02-17Revert "[Hexagon] Start using regmasks on calls"Rafael Espindola
2017-02-16[Hexagon] Start using regmasks on callsKrzysztof Parzyszek
2017-02-10[Hexagon] Introduce Hexagon V62Krzysztof Parzyszek
2017-01-23[Hexagon] Explicitly reserve aliases of reserved registersKrzysztof Parzyszek
2016-11-09[Hexagon] Separate Hexagon subreg indices for different register classesKrzysztof Parzyszek
2016-08-19[Hexagon] Improvements to handling and generation of FP instructionsKrzysztof Parzyszek
2016-08-16[Hexagon] Standardize next batch of pseudo instructionsKrzysztof Parzyszek
2016-06-12Run clang-tidy's performance-unnecessary-copy-initialization over LLVM.Benjamin Kramer
2016-05-16[Hexagon] Make getCallerSavedRegs specific to a register classKrzysztof Parzyszek
2016-04-18[NFC] Header cleanupMehdi Amini
2016-03-21[Hexagon] Fix reserving emergency spill slots for register scavengerKrzysztof Parzyszek
2016-02-18[Hexagon] Implement TLS supportKrzysztof Parzyszek
2016-02-18[Hexagon] Update the callee-saved register set for EH-aware functionsKrzysztof Parzyszek