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path: root/llvm/lib/Target/AVR/AVRISelLowering.cpp
AgeCommit message (Expand)Author
2025-11-19CodeGen: Add subtarget to TargetLoweringBase constructor (#168620)Matt Arsenault
2025-08-15[CodeGen] Give ArgListEntry a proper constructor (NFC) (#153817)Nikita Popov
2025-08-07[AVR] Fix codegen after getConstant assertions got enabled (#152269)Ayke
2025-06-22[AVR] Don't apply post-indexing on mismatched pointers (#145224)Patryk Wychowaniec
2025-06-04AVR: Move runtime libcall name setting out of TargetLowering (#142545)Matt Arsenault
2025-05-11[AVR] TableGen-erate SDNode descriptions (NFC) (#139407)Sergei Barannikov
2025-01-20[Mips] Fix compiler crash when returning fp128 after calling a functi… (#11...yingopq
2024-11-25[AVR] Remove extra ROL / ROR operands (#117510)Sergei Barannikov
2024-11-23[SelectionDAG] Fix some SDNode type mismatches between *.td files and ISel (#...Sergei Barannikov
2024-11-22[AVR] Use getSignedConstant() for negative numberNikita Popov
2024-11-18[Target] Remove unused includes (NFC) (#116577)Kazu Hirata
2024-07-11[LLVM] Factor disabled Libcalls into the initializer (#98421)Joseph Huber
2024-06-19[AVR] Let ArrayRef infer the array size (NFC) (#96076)Kazu Hirata
2024-04-18[AVR] Let ArrayRef infer the array size (NFC) (#88638)Kazu Hirata
2024-01-09[RFC][SelectionDAG] Add and use SDNode::getAsZExtVal() helper (#76710)Alex Bradbury
2024-01-02[llvm][NFC] Use SDValue::getConstantOperandVal(i) where possible (#76708)Alex Bradbury
2023-09-25[TargetLowering] Deduplicate choosing InlineAsm constraint between ISels (#67...Nick Desaulniers
2023-09-13reland [InlineAsm] wrap ConstraintCode in enum class NFC (#66264)Nick Desaulniers
2023-09-13Revert "[InlineAsm] wrap ConstraintCode in enum class NFC (#66003)"Reid Kleckner
2023-09-13[InlineAsm] wrap ConstraintCode in enum class NFC (#66003)Nick Desaulniers
2023-09-11[InlineAsm] refactor InlineAsm class NFC (#65649)Nick Desaulniers
2023-08-31[InlineAsm] wrap Kind in enum class NFCNick Desaulniers
2023-07-27[CodeGen] Store call frame size in MachineBasicBlockJay Foad
2023-06-11[AVR] Optimize 8-bit rotation when rotation bits == 3Ben Shi
2023-06-11[AVR] Optimize 8-bit rotation when rotation bits >= 4Ben Shi
2023-06-11[AVR] Fix incorrect expansion of pseudo instruction ROLBRdBen Shi
2023-06-04[AVR] Fix incorrect operands of pseudo instruction 'ROLBRd'Patryk Wychowaniec
2023-05-17[CodeGen] Replace CCState's getNextStackOffset with getStackSize (NFC)Sergei Barannikov
2023-04-17[AVR] Fix an issue of writing 16-bit portsBen Shi
2023-04-12[AVR] Disable post increment load from program memory spaceBen Shi
2023-04-02[Targets] Rename Flag->Glue. NFCCraig Topper
2023-02-15Use llvm::has_single_bit<uint32_t> (NFC)Kazu Hirata
2023-02-09[AVR] Optimize 16-bit comparison with a constantBen Shi
2023-01-08[AVR] Optimize 32-bit shifts: optimize REG_SEQUENCEAyke van Laethem
2023-01-08[AVR] Optimize 32-bit shifts: reverse shift + moveAyke van Laethem
2023-01-08[AVR] Optimize 32-bit shifts: shift by 4 bitsAyke van Laethem
2023-01-08[AVR] Optimize 32-bit shift: move bytes aroundAyke van Laethem
2023-01-08[AVR] Custom lower 32-bit shift instructionsAyke van Laethem
2023-01-05Move from llvm::makeArrayRef to ArrayRef deduction guides - llvm/ partserge-sans-paille
2022-11-28[AVR] Do not use R0/R1 on avrtinyAyke van Laethem
2022-11-24Fix MSVC "signed/unsigned mismatch" warning. NFC.Simon Pilgrim
2022-11-23[AVR] Fix wrong ABI of AVRTiny.Ben Shi
2022-09-15[SDAG] Add `getCALLSEQ_END` overload taking `uint64_t`sSergei Barannikov
2022-09-08[llvm] Use std::size instead of llvm::array_lengthofJoe Loser
2022-08-15[AVR] Only push and clear R1 in interrupts when necessaryAyke van Laethem
2022-03-26[AVR] Optimize int16 airthmetic right shift for shift amount 7/14/15Ben Shi
2022-03-24[AVR] Reject/Reserve R0~R15 on AVRTiny.Ben Shi
2022-02-11[AVR] Fix a potential assert failureBen Shi
2022-02-02[AVR] Fix atomicrmw result valueAyke van Laethem
2022-01-26Revert "Rename llvm::array_lengthof into llvm::size to match std::size from C...Benjamin Kramer
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