summaryrefslogtreecommitdiff
path: root/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
AgeCommit message (Expand)Author
2025-11-19[DAG] Update canCreateUndefOrPoison to handle ISD::VECTOR_COMPRESS (#168010)陈子昂
2025-11-18[RISCV] Legalize misaligned unmasked vp.load/vp.store to vle8/vse8. (#167745)Craig Topper
2025-11-18[DAGCombiner] Fold select into partial.reduce.add operands. (#167857)Sander de Smalen
2025-11-12DAG: exp opcodes cannotBeOrderedNegativeFP (#167604)Matt Arsenault
2025-11-12DAG: Move expandMultipleResultFPLibCall to TargetLowering (NFC) (#166988)Matt Arsenault
2025-11-12DAG: Stop using TargetLibraryInfo for multi-result FP intrinsic codegen (#166...Matt Arsenault
2025-11-10RuntimeLibcalls: Remove incorrect sincospi from most targets (#166982)Matt Arsenault
2025-11-10DAG: Handle AssertNoFPClass in computeKnownBits (#167289)Matt Arsenault
2025-11-10DAG: Fold copysign with a known signmask to a disjoint or (#167266)Matt Arsenault
2025-11-09Remove unused <set> and <map> inclusion (#167175)serge-sans-paille
2025-11-07Add `llvm.vector.partial.reduce.fadd` intrinsic (#159776)Damian Heaton
2025-11-07[SelectionDAG] Make SelectionDAG::dump(true) usable from debugger (#166722)Sergei Barannikov
2025-11-05DAG: Avoid some libcall string name comparisons (#166321)Matt Arsenault
2025-10-23[SDAG] Introduce inbounds flag for ISD::PTRADD (#162477)Fabian Ritter
2025-10-14[DAG] foldCONCAT_VECTORS - fold concat_vectors(v1xX insertelt(v,e,0), ...) ->...Simon Pilgrim
2025-10-14[GlobalISel] Add G_ADD for computeNumSignBits (#159202)Yatao Wang
2025-10-13[CodeGen] Use getObjectPtrOffset to generate loads/stores for mem intrinsics ...Derek Schuff
2025-10-13Wasm fmuladd relaxed (#163177)Sam Parker
2025-10-13[AArch64] Support commuted operands in performFlagSettingCombine (#162496)Cullen Rhodes
2025-10-13Revert "[WebAssembly] Lower fmuladd to madd and nmadd" (#163171)Sam Parker
2025-10-13[WebAssembly] Lower fmuladd to madd and nmadd (#161355)Sam Parker
2025-10-12[SelectionDAG] Remove NoInfsFPMath uses (#162788)paperchalice
2025-10-03[SelectionDAG] Add support to dump DAGs with sorted nodes (#161097)Min-Yih Hsu
2025-10-02[DAG] Add ComputeNumSignBits(FREEZE(X)) handling (#161507)Simon Pilgrim
2025-09-28[SDAG] Constant fold frexp in signed way (#161015)Hongyu Chen
2025-09-22[DAG] Add ISD::VECTOR_COMPRESS handling in computeKnownBits/ComputeNumSignBit...Kavin Gnanapandithan
2025-09-19[KnownBits] Add setAllConflict to set all bits in Zero and One. NFC (#159815)Craig Topper
2025-09-19[PowerPC] using milicode call for strlen instead of lib call (#153600)zhijian lin
2025-09-19[AMDGPU][SDAG] Handle ISD::PTRADD in various special cases (#145330)Fabian Ritter
2025-09-17[SelectionDAG] Deal with POISON for INSERT_VECTOR_ELT/INSERT_SUBVECTOR (#143102)Björn Pettersson
2025-09-17[DAG] getNode() - reuse result type instead of calling getValueType again. NF...Simon Pilgrim
2025-09-16[NFC ]Add a helper function isTailCall for getting libcall in SelectionDAG (#...zhijian lin
2025-09-05[DAG] SelectionDAG::canCreateUndefOrPoison - AVGFLOOR/AVGCEIL don't create un...Simon Pilgrim
2025-08-31[SelectionDAG] Return std::optional<unsigned> from getValidShiftAmount and fr...Craig Topper
2025-08-30[SelectionDAG] Add computeKnownBits for ISD::ROTL/ROTR. (#156142)Craig Topper
2025-08-28[KnownBits] Add operator<<=(unsigned) and operator>>=(unsigned). NFC (#155751)Craig Topper
2025-08-26[DAG] ComputeNumSignBits - ISD::EXTRACT_ELEMENT needs to return at least 1 (#...Miguel Saldivar
2025-08-23[DAG] Constant fold ISD::FSHL/FSHR nodes (#154480)XChy
2025-08-20DAG: Add assert to getNode for EXTRACT_SUBVECTOR indexes (#154099)Matt Arsenault
2025-08-19[DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::SCMP/UCMP handling + te...Temperz87
2025-08-19[DAG] Add ISD::FP_TO_SINT_SAT/FP_TO_UINT_SAT handling to SelectionDAG::canCre...Ye Tian
2025-08-15[CodeGen] Give ArgListEntry a proper constructor (NFC) (#153817)Nikita Popov
2025-08-14[SelectionDAG] Handle more opcodes in isGuaranteedNotToBeUndefOrPoison (#147019)Björn Pettersson
2025-08-12[DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::FMA/FMAD + tests (#152187)Seraphimt
2025-08-08Revert "[AMDGPU] SelectionDAG divergence tracking should take into account Ta...David Stuttard
2025-08-07[PowerPC][AIX] Using milicode for memcmp instead of libcall (#147093)zhijian lin
2025-08-07[DAG] canCreateUndefOrPoison - add FP_EXTEND (#152249)Chaitanya Koparkar
2025-08-06[DAG] getNode - fold (sext (trunc x)) -> x iff the upper bits are already sig...Simon Pilgrim
2025-08-05[VP][RISCV] Add a vp.load.ff intrinsic for fault only first load. (#128593)Craig Topper
2025-08-05[DAG] Remove Depth=1 hack from isGuaranteedNotToBeUndefOrPoison checks (#152127)Simon Pilgrim