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2025-11-23Revert "[RegAlloc] Fix the terminal rule check for interfere with DstReg (#16...Aiden Grossman
2025-11-23[RegAlloc] Fix the terminal rule check for interfere with DstReg (#168661)hstk30-hw
2025-11-22[llvm] Use llvm::equal (NFC) (#169173)Kazu Hirata
2025-11-22[CallBrPrepare] Prefer Function &F over Function &FnAiden Grossman
2025-11-22[DAGCombiner] Don't optimize insert_vector_elt into shuffle if implicit trunc...Hongyu Chen
2025-11-20TargetLowering: Avoid hardcoding OpenBSD + __guard_local name (#167744)Matt Arsenault
2025-11-20[DAGCombiner] Remove unneeded m_BitReverse from visitBITREVERSE. NFC (#168918)Craig Topper
2025-11-20Reapply "DAG: Allow select ptr combine for non-0 address spaces" (#168292) (#...Matt Arsenault
2025-11-20[SDAG] Fix whitespace errors (NFC) (#168897)Ramkumar Ramachandra
2025-11-20[DebugInfo] Force early line-zero calls to have meaningful locations (#156850)Jeremy Morse
2025-11-19[CFIInserter] Turn a reachable llvm_unreachable into a report_fatal_error. (#...Craig Topper
2025-11-20DAG: Fix constructing a temporary TargetTransformInfo instance (#168480)Matt Arsenault
2025-11-20RenameIndependentSubregs: try to only implicit def used subregs (#167486)Carl Ritson
2025-11-19DAG: Use poison for some vector result widening (#168290)Matt Arsenault
2025-11-19CodeGen: Add subtarget to TargetLoweringBase constructor (#168620)Matt Arsenault
2025-11-19DAG: Use poison when splitting vector_shuffle results (#168176)Matt Arsenault
2025-11-19[AArch64][GlobalISel] Check unmergeSrc is a vector in matchCombineBuildUnmerg...Ryan Cowan
2025-11-19[DAG] Update canCreateUndefOrPoison to handle ISD::VECTOR_COMPRESS (#168010)陈子昂
2025-11-18Introduce DwarfUnit::addBlock helper method (#168446)Tom Tromey
2025-11-18[GISel] Use getScalarSizeInBits in LegalizerHelper::lowerBitCount (#168584)Craig Topper
2025-11-18[RISCV] Legalize misaligned unmasked vp.load/vp.store to vle8/vse8. (#167745)Craig Topper
2025-11-18[GISel][RISCV] Compute CTPOP of small odd-sized integer correctly (#168559)Hongyu Chen
2025-11-18[AArch64][GISel] Don't crash in known-bits when copying from vectors to non-v...Nathan Corbyn
2025-11-18[CGP]: Optimize mul.overflow. (#148343)Hassnaa Hamdi
2025-11-18[AArch64][GlobalISel] Add better basic legalization for llround. (#168427)David Green
2025-11-18[DAGCombiner] Fold select into partial.reduce.add operands. (#167857)Sander de Smalen
2025-11-17[MLGO] Fully Remove MLRegalloc Experimental Features (#168252)Aiden Grossman
2025-11-17[AArch64][GlobalISel] Add combine for build_vector(unmerge, unmerge, undef, u...Ryan Cowan
2025-11-17[DAG] Add strictfp implicit def reg after metadata. (#168282)David Green
2025-11-17[MachinePipeliner] Detect a cycle in PHI dependencies early on (#167095)Abinaya Saravanan
2025-11-17[InlineAsmLowering] unsigned -> TypeSize for getTypeStoreSize resultpvanhout
2025-11-17[GlobalMerge]Prefer use global-merge-max-offset instead of the target-specifi...hstk30-hw
2025-11-16Revert "DAG: Allow select ptr combine for non-0 address spaces" (#168292)ronlieb
2025-11-16[CodeGen] Remove a redundant declaration (NFC) (#168285)Kazu Hirata
2025-11-16DAG: Preserve poison in combineConcatVectorOfScalars (#168220)Matt Arsenault
2025-11-16[CodeGen] Turn MCRegUnit into an enum class (NFC) (#167943)Sergei Barannikov
2025-11-16[SelectionDAG] Verify SDTCisVT and SDTCVecEltisVT constraints (#150125)Sergei Barannikov
2025-11-15[SelectionDAG] Fix AArch64 machine verifier bug when expanding LOOP_DEPENDENC...AZero13
2025-11-16[revert][CodeGen] add a command to force global merge (#168230)Austin
2025-11-16[CodeGen] add a command to force global mergeAustin
2025-11-15DAG: Use poison in SplitVecRes_VP_LOAD_FF (#167753)Matt Arsenault
2025-11-15DAG: Use poison when legalizing scalar_to_vector results (#167751)Matt Arsenault
2025-11-14[AArch64][GlobalISel] Improve lowering of vector fp16 fpext (#165554)Ryan Cowan
2025-11-14[SelectionDAGBuilder] Propagate fast-math flags to fpext (#167574)Mikołaj Piróg
2025-11-14[RDF] Rename RegisterId field in RegisterRef Reg->Id. NFC (#168154)Craig Topper
2025-11-15[GlobalISel] Return byte offsets from computeValueLLTs (NFC) (#166747)Sergei Barannikov
2025-11-14opt: Fix bad merge of #167996 (#168110)Matt Arsenault
2025-11-14RuntimeLibcalls: Move VectorLibrary handling into TargetOptions (#167996)Matt Arsenault
2025-11-14[RDF] RegisterRef/RegisterId improvements. NFC (#168030)Craig Topper
2025-11-14[GlobalISel] Add support for value/constants as inline asm memory operand (#1...Pierre van Houtryve