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path: root/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
AgeCommit message (Expand)Author
2025-10-14[llvm] Replace LLVM_ATTRIBUTE_UNUSED with [[maybe_unused]] (NFC) (#163330)Kazu Hirata
2025-10-13[NFC][LLVM][CodeGen] Namespace related cleanups (#162999)Rahul Joshi
2025-05-05[ScheduleDAG] Allow disabling the SchedModel / Itineraries during Scheduling ...Jeffrey Byrnes
2025-02-01[MachineScheduler] Fix physreg dependencies of ExitSU (#123541)Sergei Barannikov
2025-01-23[SDAG] Use BatchAAResults for querying alias analysis (AA) results (#123934)Benjamin Maxwell
2025-01-11[AMDGPU] Add target hook to isGlobalMemoryObject (#112781)Austin Kerbow
2024-12-16[NFC] Remove some unnecessary semicolonsDavid Green
2024-11-14Fix typo "necessarilly"Jay Foad
2024-09-30[NFC] Use initial-stack-allocations for more data structures (#110544)Jeremy Morse
2024-07-01[llvm][CodeGen] Avoid 'raw_string_ostream::str' (NFC) (#97318)Youngsuk Kim
2024-04-12[AArch64] Improve scheduling latency into Bundles (#86310)David Green
2024-03-11[SelectionDAG] Switch to LiveRegUnits (#84197)AtariDreams
2023-08-15[MachineScheduler] Account for lane masks in basic block liveinsJay Foad
2023-08-08[MachineScheduler] Rename Reg2SUnitsMap to RegUnit2SUnitsMapJay Foad
2023-08-07[MachineScheduler] Track physical register dependencies per-regunitJay Foad
2023-07-29Revert "[MachineScheduler] Track physical register dependencies per-regunit"Jay Foad
2023-07-29[MachineScheduler] Track physical register dependencies per-regunitJay Foad
2023-07-28[CodeGen] Clean up ScheduleDAGInstrs::addPhysRegDepsJay Foad
2023-06-01[CodeGen] Make use of MachineInstr::all_defs and all_uses. NFCI.Jay Foad
2023-04-18[MC] Use subregs/superregs instead of MCSubRegIterator/MCSuperRegIterator. NFC.Jay Foad
2023-04-17[nfc][llvm] Replace pointer cast functions in PointerUnion by llvm casting fu...Shraiysh Vaishay
2023-02-27[CodeGen] Use LLVM_ATTRIBUTE_UNUSED instead of LLVM_DUMP_METHOD on a raw_ostr...Craig Topper
2023-02-07[CodeGen] Define and use MachineOperand::getOperandNoJay Foad
2023-01-17[MIScheduler] Print top/down cycle in the SUnit dump.Francesco Petrogalli
2023-01-13[CodeGen] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFCCraig Topper
2022-09-13[NFC][ScheduleDAGInstrs] Use structure bindings and emplace_backPavel Samolysov
2022-07-18CodeGen: Remove AliasAnalysis from regallocMatt Arsenault
2022-06-05Remove unneeded cl::ZeroOrMore for cl::opt/cl::list optionsFangrui Song
2022-03-16Cleanup codegen includesserge-sans-paille
2022-03-10Revert "Cleanup codegen includes"Nico Weber
2022-03-10Cleanup codegen includesserge-sans-paille
2021-11-25[llvm] Use range-based for loops (NFC)Kazu Hirata
2021-11-06[llvm] Use llvm::reverse (NFC)Kazu Hirata
2021-10-22[ScheduleDAGInstrs] Call adjustSchedDependency in more casesJay Foad
2021-07-27[DebugInfo][InstrRef] Correctly update DBG_PHIs during instr schedulingJeremy Morse
2021-07-08[DebugInfo][InstrRef][4/4] Support DBG_INSTR_REF through all backend passesJeremy Morse
2021-04-19[CSSPGO] Exclude pseudo probes from slot indexHongtao Yu
2020-10-22[DebugInstrRef] Pass DBG_INSTR_REFs through register allocationJeremy Morse
2020-10-22ScheduleDAGInstrs: Skip debug instructions at end of scheduling regionMatt Arsenault
2020-10-11[SchedDAGInstrs] Delete redundant contains(). NFCFangrui Song
2020-09-21Revert "[NFC][ScheduleDAG] Remove unused EntrySU SUnit"Alexander Belyaev
2020-09-19Fix some clang-tidy bugprone-argument-comment issuesFangrui Song
2020-09-18[NFC][ScheduleDAG] Remove unused EntrySU SUnitFrancis Visoiu Mistrih
2020-07-31[NFC] Remove unused GetUnderlyingObject paramenterVitaly Buka
2020-06-25LiveIntervals.h.h - reduce AliasAnalysis.h include to forward declaration. NFC.Simon Pilgrim
2020-05-22Revert "[CodeGen] Add support for multiple memory operands in MachineInstr::m...Jean-Michel Gorius
2020-05-21[CodeGen] Add support for multiple memory operands in MachineInstr::mayAliasJean-Michel Gorius
2020-04-21Let targets adjust physical output- and anti-depsFraser Cormack
2020-04-17Provide operand indices to adjustSchedDependencyFraser Cormack
2020-01-10Let targets adjust operand latency of bundlesStanislav Mekhanoshin
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