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path: root/llvm/lib/CodeGen/MIRParser/MILexer.cpp
AgeCommit message (Expand)Author
2025-07-30[GISel] Introduce MIFlags::InBounds (#150900)Fabian Ritter
2025-07-29[AMDGPU] Add NoaliasAddrSpace to AAMDnodes (#149247)Shoreshen
2024-11-11[MIRLexer][RISCV] Eat a space after the Machine comment (#115365)Michael Maitland
2024-10-30[GlobalISel] Import samesign flag (#114267)Thorsten Schütt
2024-10-30Revert "[GlobalISel] Import samesign flag" (#114256)Thorsten Schütt
2024-10-30[GlobalISel] Import samesign flag (#113090)Thorsten Schütt
2024-10-28[AArch64][Libunwind] Add Support for FEAT_PAuthLR DWARF Instruction (#112171)Jack Styles
2024-06-25[LLVM][MIR] Support parsing bfloat immediates in MIR parser (#96010)Stephen Chou
2024-06-14[GlobalIsel] Import GEP flags (#93850)Thorsten Schütt
2024-03-26[CodeGen] Add nneg and disjoint flags (#86650)Thorsten Schütt
2023-12-11[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)Kazu Hirata
2023-08-20[GlobalISel] introduce MIFlag::NoConvergentSameer Sahasrabuddhe
2023-07-27[CodeGen] Store call frame size in MachineBasicBlockJay Foad
2023-07-13Revert "[CodeGen] Store SP adjustment in MachineBasicBlock. NFCI."Oliver Stannard
2023-07-12[CodeGen] Store SP adjustment in MachineBasicBlock. NFCI.Jay Foad
2023-06-01[SDAG] Preserve unpredictable metadata, teach X86CmovConversion to respect th...Dávid Bolvanský
2023-01-17[Propeller] Use Fixed MBB ID instead of volatile MachineBasicBlock::Number.Rahman Lavaee
2023-01-06[DebugInfo][NFC] Add new MachineOperand type and change DBG_INSTR_REF syntaxStephen Tozer
2022-12-13Revert "[Propeller] Use Fixed MBB ID instead of volatile MachineBasicBlock::N...Rahman Lavaee
2022-12-06[Propeller] Use Fixed MBB ID instead of volatile MachineBasicBlock::Number.Rahman Lavaee
2022-12-06[ADT] Don't including None.h (NFC)Kazu Hirata
2022-12-02[CodeGen] Use std::nullopt instead of None (NFC)Kazu Hirata
2022-11-23Use std::nullopt_t instead of NoneType (NFC)Kazu Hirata
2022-09-14[MIR] Support printing and parsing pcsectionsMarco Elver
2022-08-24KCFI sanitizerSami Tolvanen
2022-08-24Revert "KCFI sanitizer"Sami Tolvanen
2022-08-24KCFI sanitizerSami Tolvanen
2022-08-16Untangle the mess which is MachineBasicBlock::hasAddressTaken().Eli Friedman
2022-03-12Cleanup includes: DebugInfo & CodeGenserge-sans-paille
2022-02-24[MIRParser] Diagnose too large align values in MachineMemOperandsJay Foad
2021-10-07[MIRParser] Add support for IsInlineAsmBrIndirectTargetJay Foad
2021-06-28[MIRParser] Add machine metadata.Michael Liao
2021-06-14Implement DW_CFA_LLVM_* for Heterogeneous DebuggingRamNalamothu
2021-03-10[mir] Change 'undef' for MMO base addresses to 'unknown-address'Daniel Sanders
2021-01-11[CodeGen] Try to make the print of memory operand alignment a little more use...Craig Topper
2020-10-14[DebugInstrRef] Parse debug instruction-references from/to MIRJeremy Morse
2020-10-09[NFC] Reformat MILexer.cpp:getIdentifierKindScott Linder
2020-05-22MILexer.h/cpp - remove unused includes. NFC.Simon Pilgrim
2020-05-15[IR][BFloat] Add BFloat IR typeTies Stuij
2020-03-23[Win64] Insert int3 into trailing empty BBsReid Kleckner
2020-03-16Basic Block Sections support in LLVM.Sriraman Tallam
2020-02-24[MIR][ARM] MachineOperand commentsSjoerd Meijer
2020-01-10[FPEnv] Invert sense of MIFlag::FPExcept flagUlrich Weigand
2020-01-08Revert "Revert "[MIR] Target specific MIR formating and parsing""Daniel Sanders
2020-01-08Revert "[MIR] Target specific MIR formating and parsing"Nico Weber
2020-01-08[MIR] Target specific MIR formating and parsingPeng Guo
2020-01-08Revert "[MIR] Target specific MIR formating and parsing"Daniel Sanders
2020-01-08[MIR] Target specific MIR formating and parsingPeng Guo
2019-11-05[MIR] Add MIR parsing for heap alloc site instruction markersAmy Huang
2019-08-13GlobalISel: Change representation of shuffle masksMatt Arsenault
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