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Age	Commit message (Expand)	Author
2025-11-19	Reland "[MLIR][NVVM] Add tcgen05.mma MLIR Ops (#164356)" (#168638)	Pradeep Kumar
2025-11-18	Revert "[MLIR][NVVM] Add tcgen05.mma MLIR Ops" (#168583)	Mehdi Amini
2025-11-18	[MLIR][NVVM] Add tcgen05.mma MLIR Ops (#164356)	Pradeep Kumar
2025-11-17	[MLIR][NVVM] Add support for shared::cta destination (#168056)	Durgadoss R
2025-11-14	[mlir][NVVM][NFC] Remove useless options form run lines (#168098)	Valentin Clement (バレンタインクレメン)
2025-11-13	[mlir][NVVM] Make sure barrier reduction attr can roundtrip (#167958)	Valentin Clement (バレンタインクレメン)
2025-11-12	[mlir][NVVM] Add support for barrier0-reduction operation (#167036)	Valentin Clement (バレンタインクレメン)
2025-11-07	[mlir][NVVM] Add nvvm.membar operation (#166698)	Valentin Clement (バレンタインクレメン)
2025-11-05	[MLIR][NVVM] Fix the lowering of mbarrier.test.wait (#166555)	Durgadoss R
2025-11-04	[MLIR][NVVM] Update Op verifiers to prevent ungraceful exits (#165677)	Srinivasa Ravi
2025-11-04	[MLIR][NVVM] Update redux.sync op (#166125)	Srinivasa Ravi
2025-11-03	[MLIR][NVVM] Add support for Convert Ops with rs-rounding mode (#165736)	Stefan Mada
2025-10-23	[MLIR][NVVM] Add support for converting fp4/6/8 to fp16x2 (#162439)	Srinivasa Ravi
2025-10-15	[MLIR][NVVM] Add support for f32x2 to f4x2 conversion (#162273)	Srinivasa Ravi
2025-10-09	[MLIR][NVVM] Update convert Ops to use builtin types (#159704)	Srinivasa Ravi
2025-09-23	[MLIR][NVVM] Fix undef in cp.async.bulk.tensor.reduce Op (#157423)	Srinivasa Ravi
2025-09-23	[MLIR][NVVM] Update TMA Load Op (#156347)	Durgadoss R
2025-09-17	[MLIR][NVVM] Add clusterlaunchcontrol Ops (#156585)	Srinivasa Ravi
2025-09-03	[MLIR][NVVM] [NFC] Rename Tcgen05GroupKind to CTAGroupKind (#156448)	Durgadoss R
2025-09-01	[MLIR][NVVM][NVGPU] Combine prefetch and prefetch.tensormap (#153134)	Srinivasa Ravi
2025-08-29	[MLIR][NVVM] Update TMA Store Op (#155435)	Durgadoss R
2025-08-22	[MLIR][NVVM] Update TMA tensor prefetch Op (#153464)	Durgadoss R
2025-06-25	[MLIR][NVVM] Add an explicit mask operand to elect.sync (#145509)	Durgadoss R
2025-06-05	[MLIR][NVVM] Add prefetch Ops (#141737)	Srinivasa Ravi
2025-05-28	[MLIR][NVVM] Add Op to create tcgen05-mma smem descriptor (#141651)	Durgadoss R
2025-05-27	[MLIR][NVVM] Rename cvt Ops to convert (#140868)	Srinivasa Ravi
2025-05-26	[MLIR][NVVM] Add TMA linear prefetch Op (#141211)	Durgadoss R
2025-05-19	[MLIR][NVVM] Extend TMA Bulk Copy Op (#140232)	Durgadoss R
2025-05-06	[MLIR][NVVM] Update support for conversions to f8x2 and f6x2 types (#137781)	Srinivasa Ravi
2025-04-28	[MLIR][NVVM] Add support for f6x2 conversion (#136537)	Srinivasa Ravi
2025-04-22	[NVPTX] Add support for Shared Cluster Memory address space [2/2] (#136768)	modiking
2025-03-13	[MLIR][NVVM] Add support for tcgen05.{ld, st} (#130728)	Pradeep Kumar
2025-02-24	[MLIR][NVVM] [NFC] Update test cmd-lines and doc links (#128207)	Durgadoss R
2025-02-21	[MLIR][NVVM] Add Ops for tcgen05 cp and shift (#127798)	Durgadoss R
2025-02-08	[MLIR][NVVM] Add tcgen05 wait/fence Ops (#126265)	Durgadoss R
2025-02-05	[MLIR][NVVM] Add tcgen05 alloc/dealloc Ops (#125674)	Durgadoss R
2025-02-01	[MLIR][NVVM] Update Float to TF32 conversion Op (#125048)	Srinivasa Ravi
2025-01-21	[MLIR][NVVM] Add TMA Bulk Copy Ops (#123186)	Durgadoss R
2025-01-17	[MLIR][NVVM] Add Float to TF32 conversion Op (#123199)	Durgadoss R
2024-12-13	[MLIR][NVVM] Refactor tests in nvvmir.mlir (#119731)	Durgadoss R
2024-12-11	[MLIR][NVVM] Add Op for TMA Store with reduction (#118853)	Durgadoss R