summaryrefslogtreecommitdiff
path: root/mlir/test
AgeCommit message (Expand)Author
2025-11-21[MLIR] Drop use of REQUIRES:shell from tests (#168989)Aiden Grossman
2025-11-21[OpenMP][OMPIRBuilder] Use runtime CC for runtime calls (#168608)Nick Sarnie
2025-11-21[mlir][ROCDL] Adds wmma scaled intrinsics for gfx1250 (#165915)Muzammiluddin Syed
2025-11-21Revert "[MLIR][GPU] subgroup_mma fp64 extension" (#169049)Fabian Mora
2025-11-21[MLIR][GPU] subgroup_mma fp64 extension (#165873)Giacomo Castiglioni
2025-11-21[mlir][py][c] Enable setting block arg locations. (#169033)Jacques Pienaar
2025-11-21[MLIR][XeGPU][TransformOps] Add slice_dims argument to set_op_layout_attr and...Tuomas Kärnä
2025-11-21[mlir][llvm] Handle debug record import edge cases (#168774)Tobias Gysi
2025-11-20[MLIR] [XeGPU] Add distribution pattern for vector.constant_mask from Wg To S...Nishant Patel
2025-11-20[mlir][SCF] Add `scf::tileAndFuseConsumer` that tiles a consumer into a given...MaheshRavishankar
2025-11-20[mlir][spirv] Add support for SwitchOp (#168713)Igor Wodiany
2025-11-20[mlir][tosa] Fix select folder when operands are broadcast (#165481)Luke Hutton
2025-11-20[MLIR][SCFToGPU] Guard operands before AffineApplyOp::create to avoid crash (...Shashi Shankar
2025-11-20[mlir][memref] Generalize dead store detection to all view-like ops (#168507)Simone Pellegrini
2025-11-20[mlir][Vector] Add support for scalable vectors to `ScanToArithOps` (#123117)Andrzej Warzyński
2025-11-20[MLIR][LLVM] Extend DIScopeForLLVMFuncOp to handle cross-file operatio… (#1...Zichen Lu
2025-11-20Revert "[mlir][Pass] Fix crash when applying a pass to an optional interface"...Matthias Springer
2025-11-20[mlir][Pass] Fix crash when applying a pass to an optional interface (#168499)Matthias Springer
2025-11-20[mlir] Make remove-dead-values remove block and successorOperands before dele...lonely eagle
2025-11-19[tosa] : Relax dynamic dimension checks for batch for conv decompositions (#1...Sayan Saha
2025-11-19[MLIR][Vector] Add unroll pattern for vector.shape_cast (#167738)Nishant Patel
2025-11-19[MLIR][Conversion] XeGPU to XeVM: Use adaptor for getting base address from m...Sang Ik Lee
2025-11-19[mlir][LLVM] Resync memory effect attribute with LLVM IR (#168568)darkbuck
2025-11-19[mlir][vector] Missing indices on vectorization of 1-d reduction to 1-ranked ...Simone Pellegrini
2025-11-19Reland "[MLIR][NVVM] Add tcgen05.mma MLIR Ops (#164356)" (#168638)Pradeep Kumar
2025-11-18[MLIR][XeGPU] Allow create mem desc from 2d memref (#167767)Jianhui Li
2025-11-18Revert "[MLIR][NVVM] Add tcgen05.mma MLIR Ops" (#168583)Mehdi Amini
2025-11-18[MLIR][Python] Add arg_attrs and res_attrs to gpu func (#168475)Asher Mancinelli
2025-11-18[mlir][tosa] Add a pass to narrow i64 to i32 (#165581)Luke Hutton
2025-11-18[MLIR][SPIRV] Lower SPIR-V Tan/Tanh ops to LLVM intrinsics (#168419)Hank
2025-11-18Extend MemoryEffects to Support Target-Specific Memory Locations (#148650)CarolineConcatto
2025-11-18[MLIR][NVVM] Add tcgen05.mma MLIR Ops (#164356)Pradeep Kumar
2025-11-18[mlir][bufferization] Refine tensor-buffer compatibility checks (#167705)Andrei Golubev
2025-11-18[mlir][SCF] Add pass option to deactivate pattern rollback (#168481)Matthias Springer
2025-11-18[mlir][NVVM] Add no-rollback option to NVVM lowering passes (#168477)Matthias Springer
2025-11-17[mlir][amdgpu] Add lowerings for ScaledExtPacked816 (#168123)Erick Ochoa Lopez
2025-11-17[mlir][XeGPU] Use DistributeLayoutAttr instead of LayoutAttr for load gather/...Dmitry Chigarev
2025-11-17Fix side effects for LLVM integer operations (udiv, sdiv) incorrectly marked ...Jeremy Furtek
2025-11-17Add 'exact' flag to arith.shrui/shrsi/divsi/divui operations (#165923)Jeremy Furtek
2025-11-17[MLIR] Add verification that symbol operations must not have results (#168390)Tim Noack
2025-11-17[mlir][amdgpu] Fix documentation and verifiers (#167369)Erick Ochoa Lopez
2025-11-17[MLIR][NVVM] Add support for shared::cta destination (#168056)Durgadoss R
2025-11-17[Linalg] Add *Conv1D* matchers (#168050)Abhishek Varma
2025-11-15[mlir][MemRef] Add UB as a dependent dialect and use `ub.poison` for Mem2Reg ...Fabian Mora
2025-11-15[MLIR][Transform][Python] Expose applying named_sequences as a method (#168223)Rolf Morel
2025-11-15[MLIR][Python] Add tests for nvvm barrier ops (#167976)Asher Mancinelli
2025-11-15[mlir][emitc] Fix ineffective tests (#168197)Gil Rapaport
2025-11-14[MLIR] Extend vector.scatter to accept tensor as base (#165548)Ryutaro Okada
2025-11-14[mlir][tosa] Fix scatter duplicate indices check for int64 (#168085)Luke Hutton
2025-11-14[mlir][NVVM][NFC] Remove useless options form run lines (#168098)Valentin Clement (バレンタイン クレメン)
generated by cgit v1.2.3 (git 2.25.1) at 2026-05-31 19:11:11 +0000