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AgeCommit message (Expand)Author
2025-11-19[AArch64][GlobalISel] Check unmergeSrc is a vector in matchCombineBuildUnmerg...Ryan Cowan
2025-11-19[AMDGPU][SDAG] Only fold flat offsets if they are inbounds PTRADDs (#165427)Fabian Ritter
2025-11-19[DAG] Update canCreateUndefOrPoison to handle ISD::VECTOR_COMPRESS (#168010)陈子昂
2025-11-19[AMDGPU] Ignore wavefront barrier latency during scheduling DAG mutation (#16...Carl Ritson
2025-11-19[clang][NVPTX] Add remaining float to fp16 conversions (#167641)Srinivasa Ravi
2025-11-19[RISCV][NewPM] Port RISCVCodeGenPrepare to the new pass manager (#168381)Alex Bradbury
2025-11-19[PowerPC] Add custom lowering for SADD overflow for i32 and i64 (#159255)Aditi Medhane
2025-11-18[AMDGPU][GlobalISel] Add regbankselect rules for G_FSHR (#159818)Anshil Gandhi
2025-11-19[AMDGPU] Adding instruction specific features (#167809)Shoreshen
2025-11-19[NVPTX] Add a few more missing fence intrinsics (#166352)Pradeep Kumar
2025-11-18[AMDGPU] Don't fold an i64 immediate value if it can't be replicated from its...Shilei Tian
2025-11-18[HLSL][DirectX] Use a padding type for HLSL buffers. (#167404)Justin Bogner
2025-11-18[RISCV] Make XFAIL test UNSUPPORTED. (#168525)Mikhail Gudim
2025-11-18[RISCV] Legalize misaligned unmasked vp.load/vp.store to vle8/vse8. (#167745)Craig Topper
2025-11-18[GISel][RISCV] Compute CTPOP of small odd-sized integer correctly (#168559)Hongyu Chen
2025-11-18[X86] Add test examples of build vectors of reversed scalar loads that could ...Simon Pilgrim
2025-11-18[AMDGPU] Consider FLAT instructions for VMEM hazard detection (#137170)Robert Imschweiler
2025-11-18[AArch64] Reorder Comparison Trees to Facilitate CSE (#168064)Marius Kamp
2025-11-18[AMDGPU][GlobalISel] Add RegBankLegalize support for G_IS_FPCLASS (#167575)vangthao95
2025-11-18[AArch64][GISel] Don't crash in known-bits when copying from vectors to non-v...Nathan Corbyn
2025-11-18[HLSL] Implement ddx/ddy_coarse intrinsics (#164831)Alexander Johnston
2025-11-18[CGP]: Optimize mul.overflow. (#148343)Hassnaa Hamdi
2025-11-18[X86] combineTruncate - trunc(srl(load(p),amt)) -> load(p+amt/8) - ensure amt...Simon Pilgrim
2025-11-18[LLVM][CodeGen][SVE] Use DUPM for constantfp splats. (#168391)Paul Walker
2025-11-18[AArch64][GlobalISel] Add better basic legalization for llround. (#168427)David Green
2025-11-18[X86][GlobalISel] Enable nest arguments (#165173)Evgenii Kudriashov
2025-11-18[WebAssembly] Add patterns for extadd pairwise (#167960)Jasmine Tang
2025-11-18[DAGCombiner] Fold select into partial.reduce.add operands. (#167857)Sander de Smalen
2025-11-18[AArch64][SME] Add support for zeroing ZT0 to CommitZASavePseudo (#166360)Benjamin Maxwell
2025-11-18[RISCV] Add an option to enable CFIInstrInserter. (#164477)Mikhail Gudim
2025-11-18[RISCV] Reduce minimum VL needed for vslidedown.vx in RISCVVLOptimizer (#168392)Luke Lau
2025-11-18[clang][NVPTX] Fix SM requirement of f32-tf32 rna satfinite conversion (#167836)Srinivasa Ravi
2025-11-17[Arm64EC] Preserve X9 for indirect calls. (#167782)Eli Friedman
2025-11-17[AMDGPU] update LDS block size for gfx1250 (#167614)Changpeng Fang
2025-11-18[AArch64] Treat COPY between cross-register banks as expensive (#167661)Guy David
2025-11-17[AArch64][GlobalISel] Add basic GISel test coverage for lround and llround. NFCDavid Green
2025-11-17[AArch64] Optimize extending loads of small vectors (#163064)Guy David
2025-11-17[X86] Delete Profile Guided Prefetch Passes (#167317)Aiden Grossman
2025-11-17[RISCV] Fold Zba-expanded (mul (shr exact X, C1), C2) (#168019)Piotr Fusik
2025-11-17[LLVM-Tablegen] Pretty Printing Arguments in LLVM Intrinsics (#162629)Dharuni R Acharya
2025-11-17[AMDGPU][GlobalISel] Add RegBankLegalize support for G_FMUL (#167847)vangthao95
2025-11-17[AArch64][GlobalISel] Add combine for build_vector(unmerge, unmerge, undef, u...Ryan Cowan
2025-11-17[llvm][RISCV] Support splat and vp_splat for zvfbfa codegen (#167920)Brandon Wu
2025-11-17[X86] bittest-big-integer.ll - add BLSR style pattern test (#168356)Simon Pilgrim
2025-11-17[AMDGPU][NFC] Mark GEPs in flat offset folding tests as inbounds (#165426)Fabian Ritter
2025-11-17[DAG] Add strictfp implicit def reg after metadata. (#168282)David Green
2025-11-17[AArch64][GlobalISel] Fix vecreduce(zext) fold from illegal types. (#167944)David Green
2025-11-17[WebAssembly] Truncate extra bits of large elements in BUILD_VECTOR (#167223)Hongyu Chen
2025-11-17[MachinePipeliner] Detect a cycle in PHI dependencies early on (#167095)Abinaya Saravanan
2025-11-17[GlobalMerge]Prefer use global-merge-max-offset instead of the target-specifi...hstk30-hw
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