diff options
| author | Fangrui Song <i@maskray.me> | 2020-10-05 14:47:46 -0700 |
|---|---|---|
| committer | Fangrui Song <i@maskray.me> | 2020-10-05 14:47:46 -0700 |
| commit | 27e1cc6f391b57c9e20344c8a6d77a57f697eb87 (patch) | |
| tree | b57d77e7ff36d938ff9c2c14581335ff5c91012d /llvm/lib/CodeGen | |
| parent | 9afb1c566e8cb396da495e2fbbbc53e1814cc3a1 (diff) | |
Cleanup CodeGen/CallingConvLower.cpp
Patch by pi1024e (email unavailable)
Differential Revision: https://reviews.llvm.org/D82593
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/CallingConvLower.cpp | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/llvm/lib/CodeGen/CallingConvLower.cpp b/llvm/lib/CodeGen/CallingConvLower.cpp index 9662a583e369..9afaf95b5bb8 100644 --- a/llvm/lib/CodeGen/CallingConvLower.cpp +++ b/llvm/lib/CodeGen/CallingConvLower.cpp @@ -195,9 +195,7 @@ static bool isValueTypeInRegForCC(CallingConv::ID CC, MVT VT) { return true; // Assume -msse-regparm might be in effect. if (!VT.isInteger()) return false; - if (CC == CallingConv::X86_VectorCall || CC == CallingConv::X86_FastCall) - return true; - return false; + return (CC == CallingConv::X86_VectorCall || CC == CallingConv::X86_FastCall); } void CCState::getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs, @@ -213,8 +211,8 @@ void CCState::getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs, // Allocate something of this value type repeatedly until we get assigned a // location in memory. - bool HaveRegParm = true; - while (HaveRegParm) { + bool HaveRegParm; + do { if (Fn(0, VT, VT, CCValAssign::Full, Flags, *this)) { #ifndef NDEBUG dbgs() << "Call has unhandled type " << EVT(VT).getEVTString() @@ -223,7 +221,7 @@ void CCState::getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs, llvm_unreachable(nullptr); } HaveRegParm = Locs.back().isRegLoc(); - } + } while (HaveRegParm); // Copy all the registers from the value locations we added. assert(NumLocs < Locs.size() && "CC assignment failed to add location"); @@ -254,7 +252,7 @@ void CCState::analyzeMustTailForwardedRegisters( const TargetLowering *TL = MF.getSubtarget().getTargetLowering(); const TargetRegisterClass *RC = TL->getRegClassFor(RegVT); for (MCPhysReg PReg : RemainingRegs) { - unsigned VReg = MF.addLiveIn(PReg, RC); + Register VReg = MF.addLiveIn(PReg, RC); Forwards.push_back(ForwardedRegister(VReg, PReg, RegVT)); } } |