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Age	Commit message (Collapse)	Author
2025-10-02	[mlir][vector] Simplify op rewrite pattern inheriting constructors. NFC. ↵	Jakub Kuderski
	(#161670) Use the `Base` type alias from https://github.com/llvm/llvm-project/pull/158433.
2025-09-29	[MLIR][MemRef] Change builders with `int` alignment params to ↵	jiang1997
	`llvm::MaybeAlign` (#159449) Change remaining OpBuilder methods to use `llvm::MaybeAlign` instead of `uint64_t` for alignment parameters. --------- Co-authored-by: Erick Ochoa Lopez <erick.ochoalopez@amd.com>
2025-09-05	[mlir][vector] Propagate alignment when emulating masked{load,stores}. (#155648)	Erick Ochoa Lopez
	Propagate alignment from `vector.maskedload` and `vector.maskedstore` to `memref.load` and `memref.store` during `VectorEmulateMaskedLoadStore` pass.
2025-07-22	[mlir][NFC] update `mlir/Dialect` create APIs (24/n) (#149931)	Maksim Levental
	See https://github.com/llvm/llvm-project/pull/147168 for more info.
2023-12-15	[mlir][vector] Add emulation patterns for vector masked load/store (#74834)	Hsiangkai Wang
	In this patch, it will convert ``` vector.maskedload %base[%idx_0, %idx_1], %mask, %pass_thru ``` to ``` %ivalue = %pass_thru %m = vector.extract %mask[0] %result0 = scf.if %m { %v = memref.load %base[%idx_0, %idx_1] %combined = vector.insert %v, %ivalue[0] scf.yield %combined } else { scf.yield %ivalue } %m = vector.extract %mask[1] %result1 = scf.if %m { %v = memref.load %base[%idx_0, %idx_1 + 1] %combined = vector.insert %v, %result0[1] scf.yield %combined } else { scf.yield %result0 } ... ``` It will convert ``` vector.maskedstore %base[%idx_0, %idx_1], %mask, %value ``` to ``` %m = vector.extract %mask[0] scf.if %m { %extracted = vector.extract %value[0] memref.store %extracted, %base[%idx_0, %idx_1] } %m = vector.extract %mask[1] scf.if %m { %extracted = vector.extract %value[1] memref.store %extracted, %base[%idx_0, %idx_1 + 1] } ... ```