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path: root/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
AgeCommit message (Expand)Author
2022-08-24Reland "[MLIR]Extend vector.gather to support n-D result"Che-Yu Wu
2022-08-23Revert "[MLIR]Extend vector.gather to support n-D result"Mehdi Amini
2022-08-23[MLIR]Extend vector.gather to support n-D resultChe-Yu Wu
2022-08-18[mlir][LLVMIR] Change ShuffleVectorOp to use assembly formatJeff Niu
2022-08-10[mlir][LLVMIR] "Modernize" Insert/ExtractValueOpJeff Niu
2022-08-09[MLIR] Extend vector.gather to accept tensor as baseJerry Wu
2022-07-23Use callables directly in any_of, count_if, etc (NFC)Kazu Hirata
2022-07-12[mlir][VectorToLLVM] Fix bug in lowering of vector.reduce fmax/fminThomas Raoux
2022-06-28[mlir][Vector] Fix reordering of floating point adds during lower of `vector....Mahesh Ravishankar
2022-03-29[mlir][vector][nfc] Rename index optimizations optionJavier Setoain
2022-03-28[mlir] Flip Vector dialect accessors used to prefixed form.Jacques Pienaar
2022-03-25[mlir][Vector] Enable create_mask for scalable vectorsJavier Setoain
2022-03-01[mlir] Trim a huge number of unnecessary dependencies on the Func dialectRiver Riddle
2022-03-01[mlir] Rename the Standard dialect to the Func dialectRiver Riddle
2022-02-10[mlir][vector][NFC] Use CombiningKindAttr instead of StringAttrMatthias Springer
2022-02-07[mlir][NFC] Remove a few op builders that simply swap parameter orderRiver Riddle
2022-02-02[mlir] Split std.splat into tensor.splat and vector.splatRiver Riddle
2022-01-31[mlir][vector][NFC] Split into IR, Transforms and UtilsMatthias Springer
2022-01-02Apply clang-tidy fixes for performance-for-range-copy to MLIR (NFC)Mehdi Amini
2021-12-15[mlir][RFC] Add scalable dimensions to VectorTypeJavier Setoain
2021-12-03[mlir][Vector] Support 0-D vectors in `BitCastOp`Michal Terepeta
2021-11-30Revert "[MLIR] Update Vector To LLVM conversion to be aware of assume_alignment"Stephen Neuendorffer
2021-11-25[mlir][Vector] Support 0-D vectors in `VectorPrintOpConversion`Michal Terepeta
2021-11-23[mlir][Vector] Thread 0-d vectors through InsertElementOp.Nicolas Vasilache
2021-11-23[mlir][Vector] Thread 0-d vectors through ExtractElementOp.Nicolas Vasilache
2021-11-15[mlir][Linalg] Add bounded recursion declaration to FMAOp -> LLVM conversion.Nicolas Vasilache
2021-10-27[mlir:DialectConversion] Restructure how argument/target materializations get...River Riddle
2021-10-25[mlir][Vector] NFC - Add option to hook vector.transpose lowering to strategies.Nicolas Vasilache
2021-10-22[mlir][Vector] NFC - Extract rewrites related to insert/extract strided slice...Nicolas Vasilache
2021-10-19[mlir][RFC] Refactor layout representation in MemRefTypeVladislav Vinogradov
2021-10-13[MLIR] Replace std ops with arith dialect opsMogball
2021-10-05[mlir][Linalg] Add support for min/max reduction vectorization in linalg.genericDiego Caballero
2021-09-24[mlir:OpConversion] Remove the remaing usages of the deprecated matchAndRewri...River Riddle
2021-08-30[Builder] Eliminate the StringRef/StringAttr forms of getSymbolRefAttr.Chris Lattner
2021-07-21Add verifier for insert/extract element/value on type match between container...Mehdi Amini
2021-07-17[mlir][vector] Remove vector.transfer_read/write to LLVM loweringMatthias Springer
2021-07-09[mlir] factor memref-to-llvm lowering out of std-to-llvmAlex Zinenko
2021-06-24[MLIR][LLVM] Expose type translator from LLVM to MLIR TypeWilliam S. Moses
2021-05-25[mlir] Check only last dim stride in transfer op loweringMatthias Springer
2021-05-19[MLIR] Update Vector To LLVM conversion to be aware of assume_alignmentStephen Neuendorffer
2021-05-18[mlir] Allow derived rewrite patterns to define a non-virtual `initialize` hookRiver Riddle
2021-05-13[mlir] Allow empty position in vector.insert and vector.extractMatthias Springer
2021-04-08[mlir] add support for index type in vectors.Tobias Gysi
2021-04-07[mlir] Add "mask" operand to vector.transfer_read/write.Matthias Springer
2021-03-31[mlir] Change vector.transfer_read/write "masked" attribute to "in_bounds".Matthias Springer
2021-03-22[PatternMatch] Big mechanical rename OwningRewritePatternList -> RewritePatte...Chris Lattner
2021-03-15[MLIR] Create memref dialect and move dialect-specific ops from std.Julian Gross
2021-03-02[mlir][NFC] Rename `MemRefType::getMemorySpace` to `getMemorySpaceAsInt`Vladislav Vinogradov
2021-02-26[mlir][vector] add higher dimensional support to gather/scatterAart Bik
2021-02-18Perform memory accesses in the same addrspace as the corresponding memref.Andrew Pritchard
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