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path: root/llvm/test/Analysis/CostModel
AgeCommit message (Expand)Author
2025-11-21AMDGPU: Improve getShuffleCost accuracy for 8- and 16-bit shuffles (#168818)Nicolai Hähnle
2025-11-20AMDGPU: Expand cost model shufflevector test (#168816)Nicolai Hähnle
2025-11-18[AArch64] - Improve costing for Identity shuffles for SVE targets. (#165375)Pawan Nirpal
2025-11-17[CostModel][AArch64] Remove promotion cost for SVE bfloat arith supported wit...Benjamin Maxwell
2025-11-11[AArch64][CostModel] Add SVE bfloat arithmetic tests (NFC) (#166951)Benjamin Maxwell
2025-11-10[RISCV][TTI] Fix crash of non-built-in vector type cost quering. (#167258)Elvis Wang
2025-11-07[AArch64][CostModel] Replace undef with poison in sve-arith-fp.ll (NFC) (#166...Benjamin Maxwell
2025-11-04AArch64: Regenerate cost model testsMatt Arsenault
2025-11-04BasicTTI: Cleanup multiple result intrinsic handling (#165970)Matt Arsenault
2025-11-04[AArch64] Improve the cost model for extending mull (#125651)David Green
2025-11-03[AArch64] Remove old non-power2 aarch64-sve-vector-bits-min tests. NFCDavid Green
2025-10-31[CostModel][AArch64] Model cost of extract.last.active intrinsic (clastb) (#1...Graham Hunter
2025-10-24[AArch64][CostModel] Reduce cost of wider than legal get.active.lane.mask (#1...Kerry McLaughlin
2025-10-24[ARM] Update remaining cost tests with -cost-kind=all. NFCDavid Green
2025-10-23[ARM] Update more MVE costmodel tests with -cost-kind=all. NFCDavid Green
2025-10-23[Analysis][test] Remove unsafe-fp-math uses (NFC) (#164605)paperchalice
2025-10-20[IR] Replace alignment argument with attribute on masked intrinsics (#163802)Nikita Popov
2025-10-15[CostModel] Generate test checks (NFC)Nikita Popov
2025-10-15[Analysis][AArch64][NFC] Change undef to poison in most tests (#163532)David Sherwood
2025-10-15[AArch64] Replace undef with poison in sve-intrinsics.ll (NFC) (#163399)Kerry McLaughlin
2025-09-26Revert "[TTI][RISCV] Add cost modelling for intrinsic vp.load.ff (#160470)"ShihPo Hung
2025-09-26[TTI][RISCV] Add cost modelling for intrinsic vp.load.ff (#160470)Shih-Po Hung
2025-09-25[AMDGPU] Fix vector legalization for bf16 valu ops (#158439)Giuseppe Rossini
2025-09-19[ARM] Replace ABS and tABS machine nodes with custom lowering (#156717)AZero13
2025-09-17[ARM] Correct attributes on abs.ll costmodel test. NFCDavid Green
2025-09-16[ARM] Add a quick abs scalar costmodel test. NFCDavid Green
2025-09-16[ARM] Update a number of reduction tests to use -cost-kind=all. NFCDavid Green
2025-09-08[CostModel][X86] Add missing AVX1 costs for PMULUDQ v4i64 pattern (#157475)Simon Pilgrim
2025-09-04[AArch64] Give a higher cost for more expensive SVE FCMP instructions (#153816)David Green
2025-09-03[AArch64] Update cost model for extracting halves from 128+ bit vectors (#155...Gaëtan Bossu
2025-08-26[ARM] Update a number of MVE tests to use -cost-kind=all. NFCDavid Green
2025-08-21[AArch64] [CostModel] Fix cost modelling for saturating arithmetic intrinsics...Mary Kassayova
2025-08-20[ARM] Update cmps.ll, control-flow.ll and divrem.ll to use -cost-kind=all. NFCDavid Green
2025-08-14[AArch64] Change the cost of fma and fmuladd to match fmul. (#152963)David Green
2025-08-14[ARM][MVE] Add shuffle costs for LDn and STn instructions. (#145304)David Green
2025-08-12[RISCV] Cost casts with illegal types that can't be legalized (#153030)Luke Lau
2025-08-08[AArch64] Generalize costing for FP16 instructions (#150033)David Green
2025-08-08[CostModel] Provide a default model for histogram intrinsics (#149348)Graham Hunter
2025-08-08[IR] Remove size argument from lifetime intrinsics (#150248)Nikita Popov
2025-08-08[AArch64] Add SVE fmuladd and fma cost tests. NFCDavid Green
2025-08-05[ARM] Use -cost-kind=all for cast and active_lane_mask tests. NFCDavid Green
2025-08-04[AArch64] Add better fcmp costs for expanded predicates (#147940)David Green
2025-08-04[AArch64] Add sve bf16 fpext and fpround costs. (#150485)David Green
2025-08-01[LV] Pre-commit test for #151664 (#151671)Ramkumar Ramachandra
2025-07-30[RISCV] Fix bug in [l](lrint|lround) vector-cost (#151298)Ramkumar Ramachandra
2025-07-30Revert "[RISCV] Cost bf16/f16 vector non-unit memory accesses as legal withou...Luke Lau
2025-07-29[CostModel/RISCV] Fix costs of vector [l](lrint|lround) (#146058)Ramkumar Ramachandra
2025-07-29[ARM] Use -cost-kind=all for arith-overflow.ll, arith-ssat.ll and arith-usat....David Green
2025-07-28[RISCV] Cost bf16/f16 vector non-unit memory accesses as legal without zvfhmi...Luke Lau
2025-07-28[RISCV] Add FP cost model tests for no zfhmin/zfbfmin. NFCLuke Lau
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