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path: root/llvm/lib/IR/Type.cpp
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2025-11-18[HLSL][DirectX] Use a padding type for HLSL buffers. (#167404)Justin Bogner
This change drops the use of the "Layout" type and instead uses explicit padding throughout the compiler to represent types in HLSL buffers. There are a few parts to this, though it's difficult to split them up as they're very interdependent: 1. Refactor HLSLBufferLayoutBuilder to allow us to calculate the padding of arbitrary types. 2. Teach Clang CodeGen to use HLSL specific paths for cbuffers when generating aggregate copies, array accesses, and structure accesses. 3. Simplify DXILCBufferAccesses such that it directly replaces accesses with dx.resource.getpointer rather than recalculating the layout. 4. Basic infrastructure for SPIR-V handling, but the implementation itself will need work in follow ups. Fixes several issues, including #138996, #144573, and #156084. Resolves #147352.
2025-11-11Remove unused <utility> inclusionserge-sans-paille
Per https://llvm.org/docs/CodingStandards.html#include-as-little-as-possible this improves compilation time, while not being too intrusive on the codebase.
2025-10-16[DirectX] Introduce `dx.Padding` type (#160957)Justin Bogner
This introduces the `dx.Padding` type as an alternative to the `dx.Layout` types that are currently used for cbuffers. Later, we'll remove the `dx.Layout` types completely, but making the backend handle either makes it easier to stage the necessary changes to get there. See #147352 for details.
2025-08-29[DirectX] Make dx.RawBuffer an op that can't be replaced (#154620)Farzon Lotfi
fixes #152348 SimplifyCFG collapses raw buffer store from a if\else load into a select. This change prevents the TargetExtType dx.Rawbuffer from being replace thus preserving the if\else blocks. A further change was needed to eliminate the phi node before we process Intrinsic::dx_resource_getpointer in DXILResourceAccess.cpp
2025-07-23[IR] Remove static variables from ↵Craig Topper
Type::getWasm_ExternrefTy/getWasm_FuncrefTy. (#150323) These were caching pointers to memory owned by LLVMContext and can outlive the LLVMContext. The LLVMContext already caches pointer types so we shouldn't need any caching here.
2025-07-23[IR] Remove unnecessary casts from IntegerType::get. NFC (#150299)Craig Topper
2025-07-02[HLSL][SPRIV] Handle signed RWBuffer correctly (#144774)Steven Perron
In Vulkan, the signedness of the accesses to images has to match the signedness of the backing image. See https://docs.vulkan.org/spec/latest/chapters/textures.html#textures-input, where it says the behaviour is undefined if > the signedness of any read or sample operation does not match the signedness of the image’s format. Users who define say an `RWBuffer<int>` will create a Vulkan image with a signed integer format. So the HLSL that is generated must match that expecation. The solution we use is to generate a `spirv.SignedImage` target type for signed integer instead of `spirv.Image`. The two types are otherwise the same. The backend will add the `signExtend` image operand to access to the image to ensure the image is access as a signed image. Fixes #144580
2025-06-09[LLVM][IR] Support target extension types in vectors (#140630)arysef
This change is to support target extension types in vectors. The change allows sized target extension types to opt-in to being a valid vector element. Allowing target extension types as vector elements will allow backends to use vector operations such as `insertelement` and `extractelement` on their target types with minimal changes. RFC: https://discourse.llvm.org/t/rfc-supporting-sized-target-extension-types-in-vector/86431
2025-04-30[IR] Don't allow values of opaque type (#137625)Nikita Popov
Consider opaque types as non-first-class types, i.e. do not allow SSA values to have opaque type.
2025-04-30[IR] Don't allow label arguments (#137799)Nikita Popov
We currently accept label arguments to inline asm calls. This support predates both blockaddresses and callbr and is only covered by one X86 test. Remove it in favor of callbr (or at least blockaddress, though that cannot guarantee correct codegen, just like using block labels directly can't). I didn't bother implementing bitcode upgrade support for this, but I can add it if desired.
2025-04-14[IR][ADT] Remove `APFloat/Type::isIEEE` (#130496)Yingwei Zheng
Address comment https://github.com/llvm/llvm-project/pull/130477#issuecomment-2708801892.
2025-03-22[llvm] Use *Set::insert_range (NFC) (#132591)Kazu Hirata
DenseSet, SmallPtrSet, SmallSet, SetVector, and StringSet recently gained C++23-style insert_range. This patch uses insert_range with iterator ranges. For each case, I've verified that foos is defined as make_range(foo_begin(), foo_end()) or in a similar manner.
2025-03-21[RISCV] Introduce RISCV::RVVBytesPerBlock to simplify code [nfc] (#132436)Philip Reames
2025-03-20[SPIR-V] Add support for inline SPIR-V types (#125316)Cassandra Beckley
Using HLSL's [Inline SPIR-V](https://microsoft.github.io/hlsl-specs/proposals/0011-inline-spirv.html) features, users have the ability to use [`SpirvType`](https://microsoft.github.io/hlsl-specs/proposals/0011-inline-spirv.html#types) to have fine-grained control over the SPIR-V representation of a type. As explained in the spec, this is useful because it enables vendors to author headers with types for their own extensions. As discussed in [Target Extension Types for Inline SPIR-V and Decorated Types](https://github.com/llvm/wg-hlsl/pull/105), we would like to represent the HLSL SpirvType type using a 'spirv.Type' target extension type in LLVM IR. This pull request lowers that type to SPIR-V.
2025-01-21[IR] Replace of PointerType::get(Type) with opaque version (NFC) (#123617)Mats Jun Larsen
In accordance with https://github.com/llvm/llvm-project/issues/123569 In order to keep the patch at reasonable size, this PR only covers for the llvm subproject, unittests excluded.
2024-12-04[RISCV] Handle zeroinitializer of vector tuple Type (#113995)Brandon Wu
It doesn't make sense to add a new generic ISD to handle riscv tuple type. Instead we use `SPLAT_VECTOR` for ISD and further lower to `VMV_V_X`. Note: If there's `visitSPLAT_VECTOR` in generic DAG combiner, it needs to skip riscv vector tuple type. Stack on https://github.com/llvm/llvm-project/pull/114329
2024-11-22[IR] Add TargetExtType::CanBeLocal property (#99016)Jay Foad
Add a property to allow marking target extension types that cannot be used in an alloca instruction or byval argument, similar to CanBeGlobal for global variables. --------- Co-authored-by: Nikita Popov <github@npopov.com>
2024-11-19[IR] Improve check for target extension types disallowed in globals. (#116639)Jay Foad
For target extension types that are not allowed to be used as globals, also disallow them nested inside array and structure types.
2024-11-05[IR] Disallow recursive types (#114799)Jay Foad
StructType::setBody is the only mechanism that can potentially create recursion in the type system. Add a runtime check that it is not actually used to create recursion. If the check fails, report an error from LLParser, BitcodeReader and IRLinker. In all other cases assert that the check succeeds. In future StructType::setBody will be removed in favor of specifying the body when the type is created, so any performance hit from this runtime check will be temporary.
2024-10-25[AMDGPU] Add a type for the named barrier (#113614)Gang Chen
2024-10-25[IR] Fix undiagnosed cases of structs containing scalable vectors (#113455)Jay Foad
Type::isScalableTy and StructType::containsScalableVectorType failed to detect some cases of structs containing scalable vectors because containsScalableVectorType did not call back into isScalableTy to check the element types. Fix this, which requires sharing the same Visited set in both functions. Also change the external API so that callers are never required to pass in a Visited set, and normalize the naming to isScalableTy.
2024-10-02[IR] Allow fast math flags on calls with homogeneous FP struct types (#110506)Benjamin Maxwell
This extends FPMathOperator to allow calls that return literal structs of homogeneous floating-point or vector-of-floating-point types. The intended use case for this is to support FP intrinsics that return multiple values (such as `llvm.sincos`).
2024-09-19[LLVM] Use {} instead of std::nullopt to initialize empty ArrayRef (#109133)Jay Foad
It is almost always simpler to use {} instead of std::nullopt to initialize an empty ArrayRef. This patch changes all occurrences I could find in LLVM itself. In future the ArrayRef(std::nullopt_t) constructor could be deprecated or removed.
2024-09-10[DirectX] Add DirectXTargetCodeGenInfo (#104856)Helena Kotas
Adds target codegen info class for DirectX. For now it always translates `__hlsl_resource_t` handle to `target("dx.TypedBuffer", i32, 1, 0, 1)` (`RWBuffer<int>`). More work is needed to determine the actual target exp type and parameters based on the resource handle attributes. Part 1/2 of #95952
2024-09-05[IR] Check parameters of target extension types on construction (#107268)Jay Foad
Since IR Types are immutable it makes sense to check them on construction instead of in the IR Verifier pass. This patch checks that some TargetExtTypes are well-formed in the sense that they have the expected number of type parameters and integer parameters. When called from LLParser it gives a diagnostic message. When called from anywhere else it just asserts that they are well-formed.
2024-08-31[llvm][RISCV] Support RISCV vector tuple type in llvm IR (#97992)Brandon Wu
Summary: This patch proposes new llvm types for RISCV vector tuples represented as `TargetExtType` which contains both `LMUL` and `NF`(num_fields) information and keep it all the way down to `selectionDAG` to match the corresponding `MVT`(support in the following patch). Detail: Currently we have built-in C types for RISCV vector tuple type, e.g. `vint32m1x2_t`, however it's is represented as structure of scalable vector types, i.e. `{<vscale x 2 x i32>, <vscale x 2 x i32>}`. It loses the information for num_fields(NF) as struct is flattened during `selectionDAG`, thus it makes it not possible to handle inline assembly of vector tuple type, it also makes the calling convention of vector tuple types handing not strait forward and hard to realize the allocation code, i.e. `RVVArgDispatcher`. The llvm IR for the example above is then represented as `target("riscv.vector.tuple", <vscale x 8 x i8>, 2)` in which the first type parameter is the equivalent size scalable vecotr of i8 element type, the following integer parameter is the `NF` of the tuple. The new RISCV specific vector insert/extract intrinsics are also added as `llvm.riscv.vector.insert` and `llvm.riscv.vector.extract` to handle tuple type subvector insertion/extraction since the generic ones only operates on `VectorType` but not `TargetExtType`. There are total of 32 llvm types added for each `VREGS * NF <= 8`, where `VREGS` is the vector registers needed for each `LMUL` and `NF` is num_fields. The name of types are: ``` target("riscv.vector.tuple", <vscale x 1 x i8>, 2) // LMUL = mf8, NF = 2 target("riscv.vector.tuple", <vscale x 1 x i8>, 3) // LMUL = mf8, NF = 3 target("riscv.vector.tuple", <vscale x 1 x i8>, 4) // LMUL = mf8, NF = 4 target("riscv.vector.tuple", <vscale x 1 x i8>, 5) // LMUL = mf8, NF = 5 target("riscv.vector.tuple", <vscale x 1 x i8>, 6) // LMUL = mf8, NF = 6 target("riscv.vector.tuple", <vscale x 1 x i8>, 7) // LMUL = mf8, NF = 7 target("riscv.vector.tuple", <vscale x 1 x i8>, 8) // LMUL = mf8, NF = 8 target("riscv.vector.tuple", <vscale x 2 x i8>, 2) // LMUL = mf4, NF = 2 target("riscv.vector.tuple", <vscale x 2 x i8>, 3) // LMUL = mf4, NF = 3 target("riscv.vector.tuple", <vscale x 2 x i8>, 4) // LMUL = mf4, NF = 4 target("riscv.vector.tuple", <vscale x 2 x i8>, 5) // LMUL = mf4, NF = 5 target("riscv.vector.tuple", <vscale x 2 x i8>, 6) // LMUL = mf4, NF = 6 target("riscv.vector.tuple", <vscale x 2 x i8>, 7) // LMUL = mf4, NF = 7 target("riscv.vector.tuple", <vscale x 2 x i8>, 8) // LMUL = mf4, NF = 8 target("riscv.vector.tuple", <vscale x 4 x i8>, 2) // LMUL = mf2, NF = 2 target("riscv.vector.tuple", <vscale x 4 x i8>, 3) // LMUL = mf2, NF = 3 target("riscv.vector.tuple", <vscale x 4 x i8>, 4) // LMUL = mf2, NF = 4 target("riscv.vector.tuple", <vscale x 4 x i8>, 5) // LMUL = mf2, NF = 5 target("riscv.vector.tuple", <vscale x 4 x i8>, 6) // LMUL = mf2, NF = 6 target("riscv.vector.tuple", <vscale x 4 x i8>, 7) // LMUL = mf2, NF = 7 target("riscv.vector.tuple", <vscale x 4 x i8>, 8) // LMUL = mf2, NF = 8 target("riscv.vector.tuple", <vscale x 8 x i8>, 2) // LMUL = m1, NF = 2 target("riscv.vector.tuple", <vscale x 8 x i8>, 3) // LMUL = m1, NF = 3 target("riscv.vector.tuple", <vscale x 8 x i8>, 4) // LMUL = m1, NF = 4 target("riscv.vector.tuple", <vscale x 8 x i8>, 5) // LMUL = m1, NF = 5 target("riscv.vector.tuple", <vscale x 8 x i8>, 6) // LMUL = m1, NF = 6 target("riscv.vector.tuple", <vscale x 8 x i8>, 7) // LMUL = m1, NF = 7 target("riscv.vector.tuple", <vscale x 8 x i8>, 8) // LMUL = m1, NF = 8 target("riscv.vector.tuple", <vscale x 16 x i8>, 2) // LMUL = m2, NF = 2 target("riscv.vector.tuple", <vscale x 16 x i8>, 3) // LMUL = m2, NF = 3 target("riscv.vector.tuple", <vscale x 16 x i8>, 4) // LMUL = m2, NF = 4 target("riscv.vector.tuple", <vscale x 32 x i8>, 2) // LMUL = m4, NF = 2 ``` RFC: https://discourse.llvm.org/t/rfc-support-riscv-vector-tuple-type-in-llvm/80005
2024-07-25Remove the `x86_mmx` IR type. (#98505)James Y Knight
It is now translated to `<1 x i64>`, which allows the removal of a bunch of special casing. This _incompatibly_ changes the ABI of any LLVM IR function with `x86_mmx` arguments or returns: instead of passing in mmx registers, they will now be passed via integer registers. However, the real-world incompatibility caused by this is expected to be minimal, because Clang never uses the x86_mmx type -- it lowers `__m64` to either `<1 x i64>` or `double`, depending on ABI. This change does _not_ eliminate the SelectionDAG `MVT::x86mmx` type. That type simply no longer corresponds to an IR type, and is used only by MMX intrinsics and inline-asm operands. Because SelectionDAGBuilder only knows how to generate the operands/results of intrinsics based on the IR type, it thus now generates the intrinsics with the type MVT::v1i64, instead of MVT::x86mmx. We need to fix this before the DAG LegalizeTypes, and thus have the X86 backend fix them up in DAGCombine. (This may be a short-lived hack, if all the MMX intrinsics can be removed in upcoming changes.) Works towards issue #98272.
2024-04-30[IR] Use StringRef::operator== instead of StringRef::equals (NFC) (#90550)Kazu Hirata
I'm planning to remove StringRef::equals in favor of StringRef::operator==. - StringRef::operator== outnumbers StringRef::equals by a factor of 22 under llvm/ in terms of their usage. - The elimination of StringRef::equals brings StringRef closer to std::string_view, which has operator== but not equals. - S == "foo" is more readable than S.equals("foo"), especially for !Long.Expression.equals("str") vs Long.Expression != "str".
2023-12-19[IR] Disallow ZeroInit for spirv.Image (#73887)Wenju He
According to spirv spec, OpConstantNull's result type can't be image type. So we can't generate zeroinitializer for spirv.Image.
2023-12-11[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)Kazu Hirata
This patch replaces uses of StringRef::{starts,ends}with with StringRef::{starts,ends}_with for consistency with std::{string,string_view}::{starts,ends}_with in C++20. I'm planning to deprecate and eventually remove StringRef::{starts,ends}with.
2023-12-08[IR] Remove unnecessary pointer type check (NFC)Nikita Popov
With opaque pointers, the address spaces will only be the same if the types are the same, in which case this would have been handled at the start of the method already.
2023-11-22[llvm][TypeSize] Fix addition/subtraction in TypeSize. (#72979)Sander de Smalen
It seems TypeSize is currently broken in the sense that: TypeSize::Fixed(4) + TypeSize::Scalable(4) => TypeSize::Fixed(8) without failing its assert that explicitly tests for this case: assert(LHS.Scalable == RHS.Scalable && ...); The reason this fails is that `Scalable` is a static method of class TypeSize, and LHS and RHS are both objects of class TypeSize. So this is evaluating if the pointer to the function Scalable == the pointer to the function Scalable, which is always true because LHS and RHS have the same class. This patch fixes the issue by renaming `TypeSize::Scalable` -> `TypeSize::getScalable`, as well as `TypeSize::Fixed` to `TypeSize::getFixed`, so that it no longer clashes with the variable in FixedOrScalableQuantity. The new methods now also better match the coding standard, which specifies that: * Variable names should be nouns (as they represent state) * Function names should be verb phrases (as they represent actions)
2023-11-07[NFC] Remove Type::getInt8PtrTy (#71029)Paulo Matos
Replace this with PointerType::getUnqual(). Followup to the opaque pointer transition. Fixes an in-code TODO item.
2023-10-18[SVE ACLE] Allow default zero initialisation for svcount_t. (#69321)Paul Walker
This matches the behaviour of the other SVE ACLE types.
2023-09-14[IR] Enable load/store/alloca for arrays of scalable vectors.Paul Walker
Differential Revision: https://reviews.llvm.org/D158517
2023-08-10[llvm] Drop some bitcasts and references related to typed pointersBjorn Pettersson
Differential Revision: https://reviews.llvm.org/D157551
2023-08-10[IR] Deprecate some old methods for getting typed pointer typesBjorn Pettersson
The convenience methods that now are marked as deprecated are no long used in-tree. The getInt8PtrTy helper is however still used in many places, so it is not marked as deprecated to make it possible to build LLVM with -Werror. Differential Revision: https://reviews.llvm.org/D156741
2023-07-19[IR] Deprecate opaque pointer compatibility APIsNikita Popov
This deprecates various compatibility APIs that have been introduced as part of the opaque pointer migration. These will be removed at some point after the LLVM 17 release. Differential Revision: https://reviews.llvm.org/D155585
2023-07-14[IR] Remove -opaque-pointers optionNikita Popov
The test migration to opaque pointers has finished, so we can finally drop typed pointer support from LLVM \o/ This removes the ability to disable typed pointers, as well as the -opaque-pointers option, but otherwise doesn't yet touch any API surface. I'll leave deprecation/removal of compatibility APIs to future changes. This also drops a few tests: These are either testing errors that only occur with typed pointers, or type linking behavior that, to the best of my knowledge, only applies to typed pointers. Note that this will break some tests in the experimental SPIRV backend, because the maintainers have failed to update their tests in a reasonable time-frame, despite multiple warnings. In accordance with our experimental target policy, this is not a blocking concern. This issue is tracked at https://github.com/llvm/llvm-project/issues/60133. Differential Revision: https://reviews.llvm.org/D155079
2023-05-19[1/11][IR] Permit load/store/alloca for struct of the same scalable vector typeeopXD
This patch-set aims to simplify the existing RVV segment load/store intrinsics to use a type that represents a tuple of vectors instead. To achieve this, first we need to relax the current limitation for an aggregate type to be a target of load/store/alloca when the aggregate type contains homogeneous scalable vector types. Then to adjust the prolog of an LLVM function during lowering to clang. Finally we re-define the RVV segment load/store intrinsics to use the tuple types. The pull request under the RVV intrinsic specification is riscv-non-isa/rvv-intrinsic-doc#198 --- This is the 1st patch of the patch-set. This patch is originated from D98169. This patch allows aggregate type (StructType) that contains homogeneous scalable vector types to be a target of load/store/alloca. The RFC of this patch was posted in LLVM Discourse. https://discourse.llvm.org/t/rfc-ir-permit-load-store-alloca-for-struct-of-the-same-scalable-vector-type/69527 The main changes in this patch are: Extend `StructLayout::StructSize` from `uint64_t` to `TypeSize` to accommodate an expression of scalable size. Allow `StructType:isSized` to also return true for homogeneous scalable vector types. Let `Type::isScalableTy` return true when `Type` is `StructType` and contains scalable vectors Extra description is added in the LLVM Language Reference Manual on the relaxation of this patch. Authored-by: Hsiangkai Wang <kai.wang@sifive.com> Co-Authored-by: eop Chen <eop.chen@sifive.com> Reviewed By: craig.topper, nikic Differential Revision: https://reviews.llvm.org/D146872
2023-03-02[AArch64][SME2] Add CodeGen support for target("aarch64.svcount").Sander de Smalen
This patch adds AArch64 CodeGen support such that the type can be passed and returned to/from functions, and also adds support to use this type in load/store operations and PHI nodes. Reviewed By: paulwalker-arm Differential Revision: https://reviews.llvm.org/D136862
2023-03-02[SPIR-V] Remove redundant check and fix typosMichal Paszkowski
2023-03-01[IR] Add LLVM IR support for target("aarch64.svcount") type.Sander de Smalen
The C and C++ Language Extensions for AArch64 SME2 [1] adds a new type called `svcount_t` which describes a predicate. This is not a predicate vector mask, but rather a description of a predicate vector mask that can be expanded into a mask using explicit instructions. The type is a scalable opaque type. To implement `svcount_t` type this patch uses the existing Target Extension Type mechanism, but adds further support so that this type can be a scalable type. AArch64 CodeGen support will follow in a separate patch. [1] https://github.com/ARM-software/acle/pull/217 Reviewed By: jcranmer-intel, nikic Differential Revision: https://reviews.llvm.org/D136861
2023-02-27[LLVMContextImpl] Separate out opaque pointersArthur Eubanks
To make the map lookups simpler for opaque pointers and to simplify future typed pointer code removal. No significant compile time wins though. While we're here, remove the address space 0 optimization for typed pointers. Reviewed By: nikic Differential Revision: https://reviews.llvm.org/D144910
2023-02-27[SPIR-V] Support TargetExtType for SPIR-V builtin typesMichal Paszkowski
This patch adds support for TargetExtType/target(...) representing SPIR-V builtin types. After D135202, target(...) is the preferred way for representing SPIR-V builtin types in LLVM IR and the only working in the opaque pointer mode. In order to maintain compatibility with LLVM IR generated by older versions of Clang and LLVM/SPIR-V Translator, pointers-to-opaque-structs denoting SPIR-V/OpenCL builtin types will be translated to equivalent SPIR-V target extension types. This translation is only available in the typed pointer mode (-opaque-pointers=0). The relevant LIT tests with SPIR-V builtins were converted to use the new target(...) notation. Differential Revision: https://reviews.llvm.org/D144494
2023-02-17[WebAssembly] Initial support for reference type externref in clangPaulo Matos
This patch introduces a new type __externref_t that denotes a WebAssembly opaque reference type. It also implements builtin __builtin_wasm_ref_null_extern(), that returns a null value of __externref_t. This lays the ground work for further builtins and reference types. Reviewed By: aaron.ballman Differential Revision: https://reviews.llvm.org/D122215
2023-02-05Revert "[clang][WebAssembly] Initial support for reference type externref in ↵Vitaly Buka
clang" Very likely breaks stage 3 of msan build bot. Good: 764c88a50ac76a2df2d051a0eb5badc6867aabb6 https://lab.llvm.org/buildbot/#/builders/74/builds/17058 Looks unrelated: 48b5a06dfcab12cf093a1a3df42cb5b684e2be4c Bad: 48b5a06dfcab12cf093a1a3df42cb5b684e2be4c https://lab.llvm.org/buildbot/#/builders/74/builds/17059 This reverts commit eb66833d19573df97034a81279eda31b8d19815b.
2023-01-31[clang][WebAssembly] Initial support for reference type externref in clangPaulo Matos
This patch introduces a new type __externref_t that denotes a WebAssembly opaque reference type. It also implements builtin __builtin_wasm_ref_null_extern(), that returns a null value of __externref_t. This lays the ground work for further builtins and reference types. Differential Revision: https://reviews.llvm.org/D122215
2023-01-11[NFC] Use TypeSize::geFixedValue() instead of TypeSize::getFixedSize()Guillaume Chatelet
This change is one of a series to implement the discussion from https://reviews.llvm.org/D141134.
2023-01-05[NFC][IR] Avoid string leak with target extension types.Joshua Cranmer
Reviewed By: nikic, hctim Differential Revision: https://reviews.llvm.org/D141083