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path: root/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
AgeCommit message (Expand)Author
2019-01-31Revert "[opaque pointer types] Add a FunctionCallee wrapper type, and use it."James Y Knight
2019-01-31[opaque pointer types] Add a FunctionCallee wrapper type, and use it.James Y Knight
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth
2018-10-24[MIR] Add hasWinCFI fieldSanjin Sijaric
2018-10-01[codeview] Emit S_FRAMEPROC and use S_DEFRANGE_FRAMEPOINTER_RELReid Kleckner
2018-04-25[MIR] Add support for debug metadata for fixed stack objectsFrancis Visoiu Mistrih
2018-04-06[MIR] Add support for MachineFrameInfo::LocalFrameSizeFrancis Visoiu Mistrih
2018-03-30[MIR] Adding support for Named Virtual Registers in MIR.Puyan Lotfi
2018-02-28[GlobalISel] Print/Parse FailedISel MachineFunction propertyRoman Tereshin
2018-01-30LLParser: add an argument for overriding data layout and do not check alloca ...Yaxun Liu
2018-01-19AArch64: Fix emergency spillslot being out of reach for large callframesMatthias Braun
2018-01-10Revert "AArch64: Fix emergency spillslot being out of reach for large callfra...Matthias Braun
2018-01-10AArch64: Fix emergency spillslot being out of reach for large callframesMatthias Braun
2017-12-15MachineFunction: Return reference from getFunction(); NFCMatthias Braun
2017-11-17MIRParser: Avoid reading uninitialized memory on generic vregsJustin Bogner
2017-10-12Add DK_Remark to SMDiagnosticAdam Nemet
2017-09-28MIR: Serialize CaleeSavedInfo Restored flagMatthias Braun
2017-08-02[MIR] Print target-specific constant poolsDiana Picus
2017-07-20Add an ID field to StackObjectsMatt Arsenault
2017-06-06llc: Add ability to parse mir from stdinMatthias Braun
2017-06-06CodeGen: Refactor MIR parsingMatthias Braun
2017-05-30MIR: remove explicit "noVRegs" property.Tim Northover
2017-05-01MachineFrameInfo: Track whether MaxCallFrameSize is computed yet; NFCMatthias Braun
2017-04-11MIR: Allow parsing of empty machine functionsJustin Bogner
2017-03-19[MIR] Support Customed Register Mask and CSRsOren Ben Simhon
2017-03-15ARM: avoid clobbering register in v6 jump-table expansion.Tim Northover
2017-01-18MIRParser: Allow regclass specification on operandMatthias Braun
2016-11-30Move VariableDbgInfo from MachineModuleInfo to MachineFunctionMatthias Braun
2016-11-15MIRParser: Add support for parsing vreg reg alloc hintsTom Stellard
2016-10-11MIRParser: Rewrite register info initialization; mostly NFCMatthias Braun
2016-09-17Don't create a SymbolTable in Function when the LLVMContext discards value na...Mehdi Amini
2016-09-17[MIR Parser] Fix Build!Mehdi Amini
2016-09-17MIR Parser: issue an error when the Context discard value names.Mehdi Amini
2016-09-12GlobalISel: disambiguate types when printing MIRTim Northover
2016-09-09GlobalISel: move type information to MachineRegisterInfo.Tim Northover
2016-09-08[YAMLIO] Add the ability to map with context.Zachary Turner
2016-08-26[MFProperties] Introduce a reset method with no argument.Quentin Colombet
2016-08-25MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compu...Matthias Braun
2016-08-24MIRParser/MIRPrinter: Compute HasInlineAsm instead of printing/parsing itMatthias Braun
2016-08-24MachineRegisterInfo/MIR: Initialize tracksSubRegLiveness early, do not print/...Matthias Braun
2016-08-24MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it.Matthias Braun
2016-08-23MachineFunction: Introduce NoPHIs propertyMatthias Braun
2016-08-02[GlobalISel] Add Selected MachineFunction property.Ahmed Bougacha
2016-08-02[GlobalISel] Add RegBankSelected MachineFunction property.Ahmed Bougacha
2016-08-02[GlobalISel] Add Legalized MachineFunction property.Ahmed Bougacha
2016-07-28MachineFunction: Return reference for getFrameInfo(); NFCMatthias Braun
2016-07-14MIRParser: Fix MIRParser not reporting nullptr on error.Matthias Braun
2016-07-13MIRParser: Move SlotMapping and SourceMgr refs to PFS; NFCMatthias Braun
2016-07-13MIRParser: Move MachineFunction reference into PFS; NFCMatthias Braun
2016-06-08[MIR] Check that generic virtual registers get a size.Quentin Colombet
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