summaryrefslogtreecommitdiff
path: root/llvm/include/llvm/Target
AgeCommit message (Expand)Author
2025-11-19[AArch64][GlobalISel] Added support for hadd family of intrinsics (#163985)Joshua Rodriguez
2025-11-19TableGen: Support target specialized pseudoinstructions (#159880)Matt Arsenault
2025-11-17[AArch64][GlobalISel] Add combine for build_vector(unmerge, unmerge, undef, u...Ryan Cowan
2025-11-14opt: Fix bad merge of #167996 (#168110)Matt Arsenault
2025-11-14RuntimeLibcalls: Move VectorLibrary handling into TargetOptions (#167996)Matt Arsenault
2025-11-07Add `llvm.vector.partial.reduce.fadd` intrinsic (#159776)Damian Heaton
2025-11-06[IR] llvm.reloc.none intrinsic for no-op symbol references (#147427)Daniel Thornburgh
2025-10-29[AArch64][GlobalISel] Add a constant funnel shift post-legalizer combine. (#1...David Green
2025-10-26[llvm] Add "override" where appropriate (NFC) (#165168)Kazu Hirata
2025-10-24[GlobalISel] Make scalar G_SHUFFLE_VECTOR illegal. (#140508)David Green
2025-10-22[CodeGen][Target] Remove UnsafeFPMath uses (#164549)paperchalice
2025-10-13Wasm fmuladd relaxed (#163177)Sam Parker
2025-10-13Revert "[WebAssembly] Lower fmuladd to madd and nmadd" (#163171)Sam Parker
2025-10-13[WebAssembly] Lower fmuladd to madd and nmadd (#161355)Sam Parker
2025-10-10[SelectionDAG] Add SDTCisInt<1> to SDTVecReduce and SDTCisEltOfVec to SDTFPVe...Craig Topper
2025-10-10[SelectionDAG] Add SDTCisSameNumEltsAs to more operations. NFC (#162759)Craig Topper
2025-10-10[AArch64][GlobalISel] Add G_FPEXT(G_FCONSTANT) folding (#162829)Ryan Cowan
2025-10-10Revert "[AArch64][GlobalISel] Add G_FPEXT(G_FCONSTANT) folding" (#162805)Ryan Cowan
2025-10-10[AArch64][GlobalISel] Add G_FPEXT(G_FCONSTANT) folding (#160902)Ryan Cowan
2025-10-09[SelectionDAG] Add SDTCisSameNumEltsAs to SDTIntShiftOp. (#162756)Craig Topper
2025-10-09[SelectionDAG] Add stricter SDTypeProfile for strict_fsetcc(s). (#162724)Craig Topper
2025-10-08[GlobalISel] fdiv to fmul transform (#144305)David Green
2025-10-03[TableGen][SchedModel] Introduce a new SchedPredicate that checks against Sub...Min-Yih Hsu
2025-10-04[TableGen] Set `G_GLOBAL_VALUE` out operand type to `ptype0` (#161894)Alex White
2025-10-02[AArch64][GlobalISel] Add `G_FMODF` instruction (#160061)Ryan Cowan
2025-10-01Cleanup the LLVM exported symbols namespace (#161240)Nicolai Hähnle
2025-09-25[X86][GlobalISel] Added support for llvm.set.rounding (#156591)JaydeepChauhan14
2025-09-19CodeGen: Add RegisterClass by HwMode (#158269)Matt Arsenault
2025-09-19TableGen: Remove dead def of implicit node (#159688)Matt Arsenault
2025-09-18CodeGen: Do not define LOCAL_ESCAPE with ptr_rc (#158765)Matt Arsenault
2025-09-10[GISel] Combine shift + trunc + shift pattern (#155583)jyli0116
2025-09-10[TableGen][CodeGen] Remove feature string from HwMode (#157600)Sergei Barannikov
2025-09-09[MachineOutliner] Add profile guided outlining (#154437)Ellis Hoag
2025-09-04[AMDGPU][gfx1250] Add 128B cooperative atomics (#156418)Pierre van Houtryve
2025-09-02[Intrinsics][AArch64] Add intrinsics for masking off aliasing vector lanes (#...Sam Tebbs
2025-09-01[PseudoProbe] Support emitting to COFF object (#123870)Haohai Wen
2025-08-30[TableGen][CodeGen] Remove DisableEncoding field of Instruction class (#156098)Sergei Barannikov
2025-08-29[IR][CodeGen] Remove "approx-func-fp-math" attribute (#155740)paperchalice
2025-08-27[GISel] Funnel shift combiner port from SelectionDAG ISel to GlobalISel (#135...Axel Sorenson
2025-08-21[GlobalISel] Support saturated truncate (#150219)jyli0116
2025-08-21[GlobalISel] Add a fadd 0.0 combine with nsz (#153748)David Green
2025-08-20[GlobalISel] Legalize Saturated Truncate instructions and intrinsics (#154340)jyli0116
2025-08-12[TableGen] Move hasCompleteDecoder bit from Operand to DAGOperand (#153165)Sergei Barannikov
2025-08-07[CodeGen] Move IsFixed into ArgFlags (NFCI) (#152319)Nikita Popov
2025-07-30[GISel] Introduce MIFlags::InBounds (#150900)Fabian Ritter
2025-07-30Reapply "[CodeGen][NPM] Stitch up loop passes in codegen pipeline" (#151098)Vikram Hegde
2025-07-28Reapply "[llvm] Add CalleeTypeIds field to CallSiteInfo" (#150335) (#150990)Prabhu Rajasekaran
2025-07-28[WebAssembly] Add pattern for relaxed nmadd (#150684)Jasmine Tang
2025-07-28Revert "[CodeGen][NPM] Stitch up loop passes in codegen pipeline" (#150883)Vikram Hegde
2025-07-28[CodeGen][NPM] Stitch up loop passes in codegen pipeline (#148114)Vikram Hegde