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2025-07-28[lldb] support ieee_single and ieee_double gdbtypes for registers (#150268)satyanarayana reddy janga
Some gdb remote servers send target.xml that contains ``` <reg name='ft0' bitsize='32' type='ieee_single' dwarf_regnum='32'/> <reg name='ft1' bitsize='32' type='ieee_single' dwarf_regnum='33'/> <reg name='ft2' bitsize='32' type='ieee_single' dwarf_regnum='34'/> <reg name='ft3' bitsize='32' type='ieee_single' dwarf_regnum='35'/> <reg name='ft4' bitsize='32' type='ieee_single' dwarf_regnum='36'/> <reg name='ft5' bitsize='32' type='ieee_single' dwarf_regnum='37'/> <reg name='ft6' bitsize='32' type='ieee_single' dwarf_regnum='38'/> <reg name='ft7' bitsize='32' type='ieee_single' dwarf_regnum='39'/> ``` it seems like a valid and supported type in gdb. from gdb16.3/gdb/target_descriptions.c (could not find a way to link it). ``` case TDESC_TYPE_IEEE_SINGLE: m_type = init_float_type (alloc, -1, "builtin_type_ieee_single", floatformats_ieee_single); return; case TDESC_TYPE_IEEE_DOUBLE: m_type = init_float_type (alloc, -1, "builtin_type_ieee_double", floatformats_ieee_double); return; ``` ### Testplan updated unittest to test this. Reviewers: @clayborg , @jeffreytan81 , @Jlalond
2025-02-20[lldb][RISC-V] Extended if conditions to support alias names for registers ↵kper
(#124475) Extending the conditionals in `AugmentRegisterInfo` to support alternative names for lldb. Fixes #124023 There is an exception with register `X8` which is not covered here but more details can be found in the issue https://github.com/llvm/llvm-project/issues/127900.
2023-05-25[NFC][Py Reformat] Reformat python files in lldbJonas Devlieghere
This is an ongoing series of commits that are reformatting our Python code. Reformatting is done with `black` (23.1.0). If you end up having problems merging this commit because you have made changes to a python file, the best way to handle that is to run `git checkout --ours <yourfile>` and then reformat it with black. RFC: https://discourse.llvm.org/t/rfc-document-and-standardize-python-code-style Differential revision: https://reviews.llvm.org/D151460
2022-08-15[LLDB] Remove __future__ imports from testsDavid Spickett
Not needed now that we require python 3. Reviewed By: kastiglione, JDevlieghere Differential Revision: https://reviews.llvm.org/D131761
2022-06-17[lldb][tests] Automatically call compute_mydir (NFC)Dave Lee
Eliminate boilerplate of having each test manually assign to `mydir` by calling `compute_mydir` in lldbtest.py. Differential Revision: https://reviews.llvm.org/D128077
2021-11-16[lldb/test] Move gdb client utils into the packages treePavel Labath
This infrastructure has proven proven its worth, so give it a more prominent place. My immediate motivation for this is the desire to reuse this infrastructure for qemu platform testing, but I believe this move makes sense independently of that. Moving this code to the packages tree will allow as to add more structure to the gdb client tests -- currently they are all crammed into the same test folder as that was the only way they could access this code. I'm splitting the code into two parts while moving it. The first once contains just the generic gdb protocol wrappers, while the other one contains the unit test glue. The reason for that is that for qemu testing, I need to run the gdb code in a separate process, so I will only be using the first part there. Differential Revision: https://reviews.llvm.org/D113893
2021-10-20[lldb] [ABI/X86] Support combining xmm* and ymm*h regs into ymm*Michał Górny
gdbserver does not expose combined ymm* registers but rather XSAVE-style split xmm* and ymm*h portions. Extend value_regs to support combining multiple registers and use it to create user-friendly ymm* registers that are combined from split xmm* and ymm*h portions. Differential Revision: https://reviews.llvm.org/D108937
2021-10-19Revert "[lldb] [ABI/X86] Support combining xmm* and ymm*h regs into ymm*"Michał Górny
This reverts commit 5352ea4a721ef252129994111b83dc350ecc71da. It seems to have broken the arm buildbot.
2021-10-19[lldb] [ABI/X86] Support combining xmm* and ymm*h regs into ymm*Michał Górny
gdbserver does not expose combined ymm* registers but rather XSAVE-style split xmm* and ymm*h portions. Extend value_regs to support combining multiple registers and use it to create user-friendly ymm* registers that are combined from split xmm* and ymm*h portions. Differential Revision: https://reviews.llvm.org/D108937
2021-10-15[lldb] [test] Add TestGDBServerTargetXML tests for x86 duplicate subregsMichał Górny
2021-10-15[lldb] [test] Simplify X86 TestGDBServerTargetXML logic to match AArch64Michał Górny
2021-10-15[lldb] [ABI/AArch64] Do not add subregs if some of them are presentMichał Górny
Fix a bug introduced while refactoring ABIAArch64::AugmentRegisterInfo() that caused subregisters to be added even if they were already present. Instead, abort immediately if at least one subregister is found (following ABIX86). While at it, add a test for that. Differential Revision: https://reviews.llvm.org/D111881
2021-10-15[lldb] [ABI/X86] Add pseudo-registers if missingMichał Górny
Differential Revision: https://reviews.llvm.org/D108831
2021-10-12[lldb] [gdb-remote] Fix displaying i387_ext & vec regs with gdbserverMichał Górny
Adjust the encoding and format applied to i387_ext and vec* type registers from gdbserver to match lldb-server. Both types are now displayed as vector of uint8 instead of float and integer formats used before. Additionally, this fixes display of STi registers when they do not carry floating-point data (they are also used to hold MMX vectors). Differential Revision: https://reviews.llvm.org/D108468
2021-10-11[lldb] [ABI/AArch64] Add pseudo-regs if missingMichał Górny
Create pseudo-registers on the AArch64 target if they are not provided by the remote server. This is the case for gdbserver. The created registers are: - 32-bit wN partials for 64-bit xN registers - double precision floating-point dN registers (overlapping with vN) - single precision floating-point sN registers (overlapping with vN) Differential Revision: https://reviews.llvm.org/D109876
2021-09-20[lldb] [gdb-remote] Recognize aarch64v type from gdbserverMichał Górny
Differential Revision: https://reviews.llvm.org/D109899
2021-09-16[lldb] [Process/gdb-remote] Alias sp to x31 on AArch64 for gdbserverMichał Górny
Alias the "sp" register to "x31" on AArch64 if one is present and does not have the alt_name. This is the case when connecting to gdbserver. Differential Revision: https://reviews.llvm.org/D109695
2021-09-16[lldb] [ABI/AArch64] Recognize special regs by their xN names tooMichał Górny
Recognize lr/sp/fp by their numeric register names in the ABI plugin. This is necessary to mark them appropriately when interfacing with gdbserver. Differential Revision: https://reviews.llvm.org/D109691
2021-09-16[lldb] [gdb-remote] Try using <architecture/> for remote arch unconditionallyMichał Górny
Try determining the process architecture from <architecture/> tag unconditionally, rather than for very specific cases. Generic gdbserver implementations do not support LLDB-specific packets used to determine the process architecture, therefore this fallback is necessary to support architecture-specific behavior on these targets. Rather than maintaining a mapping of all known architectures, just try mapping the GDB values into triplets, as that is going to work most of the time. This change is confirmed to fix LLDB against gdbserver when debugging i386 and aarch64 executables. Differential Revision: https://reviews.llvm.org/D109272
2021-09-13[lldb] Support querying registers via generic names without alt_namesMichał Górny
Update GetRegisterInfoByName() methods to support getting registers by a generic name independently of alt_name entries in the register context. This makes it possible to use generic names when interacting with gdbserver (that does not supply alt_names). It also makes it possible to remove some of the duplicated information from register context declarations and/or use alt_names for another purpose. Differential Revision: https://reviews.llvm.org/D108554