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path: root/clang/test/CodeGen/target-data.c
AgeCommit message (Expand)Author
2025-10-13AMDGPU: Use ELF mangling in data layout (#163011)Matt Arsenault
2025-08-28[NVPTX] Support i256 load/store with 256-bit vector load (#155198)Alex MacLean
2025-07-15Remove Native Client support (#133661)Brad Smith
2025-05-19[AMDGPU] Set AS8 address width to 48 bitsAlexander Richardson
2025-04-22[NVPTX] Add support for Shared Cluster Memory address space [1/2] (#135444)modiking
2025-02-04[NVPTX] Add tcgen05 alloc/dealloc intrinsics (#124961)Durgadoss R
2024-12-10[WebAssembly] Add `-i128:128` to the `datalayout` string. (#119204)Dan Gohman
2024-12-09[PowerPC] Update data layout aligment of i128 to 16 (#118004)Lei Huang
2024-11-06[MIPS] LLVM data layout give i128 an alignment of 16 for mips64 (#112084)yingopq
2024-11-05[clang][llvm][SPIR-V] Explicitly encode native integer widths for SPIR-V (#11...Alex Voicu
2024-10-15[clang][aarch64] Add support for the MSVC qualifiers __ptr32, __ptr64, __sptr...Daniel Paoliello
2024-09-30[SPARC] Align i128 to 16 bytes in SPARC datalayouts (#106951)Koakuma
2024-08-08[SystemZ][z/OS] __ptr32 support for z/OS (#101696)Abhina Sree
2024-06-28[NFC] [clang][SPIR-V] Use AMDGPU prefix to avoid confusion (#96962)Jinsong Ji
2024-06-07[clang][SPIR-V] Add support for AMDGCN flavoured SPIRV (#89796)Alex Voicu
2024-05-05[clang backend] In AArch64's DataLayout, specify a minimum function alignment...Doug Wyatt
2024-04-16[clang][CodeGen] Add AS for Globals to SPIR & SPIRV datalayouts (#88455)Alex Voicu
2023-12-15[AMDGPU] - Add address space for strided buffers (#74471)Jessica Del
2023-10-11[X86] Align i128 to 16 bytes in x86 datalayoutsHarald van Dijk
2023-05-03Re-land "[AMDGPU] Define data layout entries for buffers""Krzysztof Drewniak
2023-05-03Revert "[AMDGPU] Define data layout entries for buffers"Krzysztof Drewniak
2023-05-03[AMDGPU] Define data layout entries for buffersKrzysztof Drewniak
2023-04-18[PowerPC] Add function pointer alignment to DataLayoutDavid Tenty
2022-09-08[SystemZ] Improve handling of vector alignments.Jonas Paulsson
2022-01-23[X86][MS] Change the alignment of f80 to 16 bytes on Windows 32bits to match ...Phoebe Wang
2022-01-15Revert "[X86][MS] Change the alignment of f80 to 16 bytes on Windows 32bits t...Phoebe Wang
2022-01-12[X86][MS] Change the alignment of f80 to 16 bytes on Windows 32bits to match ...Phoebe Wang
2021-10-20[WebAssembly] Implementation of table.get/set for reftypes in LLVM IRPaulo Matos
2021-09-24[SystemZ][z/OS] Add GOFF Support to the DataLayoutAnirudh Prasad
2021-07-26[SystemZ] Add support for new cpu architecture - arch14Ulrich Weigand
2021-07-22[WebAssembly] Implementation of global.get/set for reftypes in LLVM IRPaulo Matos
2021-07-02Revert "[WebAssembly] Implementation of global.get/set for reftypes in LLVM IR"Roman Lebedev
2021-07-02[WebAssembly] Implementation of global.get/set for reftypes in LLVM IRPaulo Matos
2021-05-11[WebAssembly] Support for WebAssembly globals in LLVM IRPaulo Matos
2021-04-21Delete le32/le64 targetsFangrui Song
2021-03-08[PowerPC] Change target data layout for 16-byte stack alignmentAhsan Saghir
2021-01-02[PowerPC] Support powerpcle target in Clang [3/5]Brandon Bergren
2020-11-30[VE] Specify vector alignmentsKazushi (Jam) Marukawa
2020-11-20[AMDGPU] Set the default globals address space to 1Alex Richardson
2020-11-10Fix the data layout mangling specification for 'arm64-pc-win32-macho'Akira Hatanaka
2020-09-28[PowerPC] Legalize v256i1 and v512i1 and implement load and store of these typesBaptiste Saleil
2020-08-29[PPC] Fix platform definitions when compiling FreeBSD powerpc64 as LEDimitry Andric
2020-07-21Fix the data layout mangling specification for 'i686-pc-macho'Akira Hatanaka
2020-07-06[VE] Correct stack alignmentKazushi (Jam) Marukawa
2020-03-28[BPF] support 128bit int explicitly in layout specYonghong Song
2020-02-10[SytemZ] Disable vector ABI when using option -march=arch[8|9|10]Kai Nacke
2020-02-04[SystemZ] Support -msoft-floatJonas Paulsson
2019-11-12AArch64: add arm64_32 support to Clang.Tim Northover
2019-09-20[SystemZ] Support z15 processor nameUlrich Weigand
2019-09-10Reland "Change the X86 datalayout to add three address spacesAmy Huang
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