summaryrefslogtreecommitdiff
path: root/bolt/lib/Core/BinarySection.cpp
AgeCommit message (Collapse)Author
2025-11-07[BOLT] Refactor undefined symbols handling. NFCI (#167075)Maksim Panchenko
Remove internal undefined symbol tracking and instead rely on the emission state of `MCSymbol` while processing data-to-code relocations. Note that `CleanMCState` pass resets the state of all `MCSymbol`s prior to code emission.
2025-05-08[BOLT][AArch64] Patch functions targeted by optional relocs (#138750)Maksim Panchenko
On AArch64, we create optional/weak relocations that may not be processed due to the relocated value overflow. When the overflow happens, we used to enforce patching for all functions in the binary via --force-patch option. This PR relaxes the requirement, and enforces patching only for functions that are target of optional relocations. Moreover, if the compact code model is used, the relocation overflow is guaranteed not to happen and the patching will be skipped.
2025-04-04[BOLT] Skip out-of-range pending relocations (#116964)Paschalis Mpeis
When a pending relocation is created it is also marked whether it is optional or not. It can be optional when such relocation is added as part of an optimization (i.e., `scanExternalRefs`). When bolt tries to `flushPendingRelocations`, it safely skips any optional relocations that cannot be encoded due to being out of range. A pre-requisite to that is the usage of the `-force-patch` flag. Alternatrively, BOLT will bail out with a relevant message. Background: BOLT, as part of scanExternalRefs, identifies external references from calls and creates some pending relocations for them. Those when flushed will update references to point to the optimized functions. This optimization can be disabled using `--no-scan`. BOLT can assert if any of these pending relocations cannot be encoded. This patch does not disable this optimization but instead selectively applies it given that a pending relocation is optional and `-force-patch` was enabled.
2024-11-19[BOLT] Overwrite .eh_frame and .gcc_except_table (#116755)Maksim Panchenko
Under --use-old-text or --strict, we completely rewrite contents of EH frames and exception tables sections. If new contents of either section do not exceed the size of the original section, rewrite the section in-place.
2024-02-21[BOLT] Fix memory leak in BinarySection (#82520)Maksim Panchenko
The change in #80950 exposed a memory leak in BinarySection. Let BinarySection manage memory passed via updateContents() unless a valid SectionID is set indicating that the contents are managed by JITLink.
2024-02-12[BOLT][NFC] Propagate BOLTErrors from Core, RewriteInstance, and passes ↵Amir Ayupov
(2/2) (#81523) As part of the effort to refactor old error handling code that would directly call exit(1), in this patch continue the migration on libCore, libRewrite and libPasses to use the new BOLTError class whenever a failure occurs. Test Plan: NFC Co-authored-by: Rafael Auler <rafaelauler@fb.com>
2024-02-06[BOLT] Use new contents when emitting sections with relocations (#80782)Maksim Panchenko
We can use BinarySection::updateContents() to change section contents. However, if we also add relocations for new contents, then the original data (i.e. not updated) is going to be used. Fix that. A follow-up diff will use the update interface and will include a test case.
2023-11-09[BOLT] Fix typos (#68121)spaette
Closes https://github.com/llvm/llvm-project/issues/63097 Before merging please make sure the change to bolt/include/bolt/Passes/StokeInfo.h is correct. bolt/include/bolt/Passes/StokeInfo.h ```diff // This Pass solves the two major problems to use the Stoke program without - // proting its code: + // probing its code: ``` I'm still not happy about the awkward wording in this comment. bolt/include/bolt/Passes/FixRelaxationPass.h ``` $ ed -s bolt/include/bolt/Passes/FixRelaxationPass.h <<<'9,12p' // This file declares the FixRelaxations class, which locates instructions with // wrong targets and fixes them. Such problems usually occures when linker // relaxes (changes) instructions, but doesn't fix relocations types properly // for them. $ ``` bolt/docs/doxygen.cfg.in bolt/include/bolt/Core/BinaryContext.h bolt/include/bolt/Core/BinaryFunction.h bolt/include/bolt/Core/BinarySection.h bolt/include/bolt/Core/DebugData.h bolt/include/bolt/Core/DynoStats.h bolt/include/bolt/Core/Exceptions.h bolt/include/bolt/Core/MCPlusBuilder.h bolt/include/bolt/Core/Relocation.h bolt/include/bolt/Passes/FixRelaxationPass.h bolt/include/bolt/Passes/InstrumentationSummary.h bolt/include/bolt/Passes/ReorderAlgorithm.h bolt/include/bolt/Passes/StackReachingUses.h bolt/include/bolt/Passes/StokeInfo.h bolt/include/bolt/Passes/TailDuplication.h bolt/include/bolt/Profile/DataAggregator.h bolt/include/bolt/Profile/DataReader.h bolt/lib/Core/BinaryContext.cpp bolt/lib/Core/BinarySection.cpp bolt/lib/Core/DebugData.cpp bolt/lib/Core/DynoStats.cpp bolt/lib/Core/Relocation.cpp bolt/lib/Passes/Instrumentation.cpp bolt/lib/Passes/JTFootprintReduction.cpp bolt/lib/Passes/ReorderData.cpp bolt/lib/Passes/RetpolineInsertion.cpp bolt/lib/Passes/ShrinkWrapping.cpp bolt/lib/Passes/TailDuplication.cpp bolt/lib/Rewrite/BoltDiff.cpp bolt/lib/Rewrite/DWARFRewriter.cpp bolt/lib/Rewrite/RewriteInstance.cpp bolt/lib/Utils/CommandLineOpts.cpp bolt/runtime/instr.cpp bolt/test/AArch64/got-ld64-relaxation.test bolt/test/AArch64/unmarked-data.test bolt/test/X86/Inputs/dwarf5-cu-no-debug-addr-helper.s bolt/test/X86/Inputs/linenumber.cpp bolt/test/X86/double-jump.test bolt/test/X86/dwarf5-call-pc-function-null-check.test bolt/test/X86/dwarf5-split-dwarf4-monolithic.test bolt/test/X86/dynrelocs.s bolt/test/X86/fallthrough-to-noop.test bolt/test/X86/tail-duplication-cache.s bolt/test/runtime/X86/instrumentation-ind-calls.s
2023-06-19[BOLT] Fix a warning in release buildsKazu Hirata
This patch fixes: bolt/lib/Core/BinarySection.cpp:120:24: error: unused variable 'Relocation' [-Werror,-Wunused-variable]
2023-06-19[BOLT] Implement composed relocationsJob Noorman
BOLT currently assumes (and asserts) that no two relocations can share the same offset. Although this is true in most cases, ELF has a feature called (not sure if this is an official term) composed relocations [1] where multiple relocations at the same offset are combined to produce a single value. For example, to support label subtraction (a - b) on RISC-V, two relocations are emitted at the same offset: - R_RISCV_ADD32 a + 0 - R_RISCV_SUB32 b + 0 which, when combined, will produce the value of (a - b). To support this in BOLT, first, RelocationSetType in BinarySection is changed to be a multiset in order to allow it to store multiple relocations at the same offset. Next, Relocation::emit() is changed to receive an iterator pair of relocations. In most cases, these will point to a single relocation in which case its behavior is unaltered by this patch. For composed relocations, they should point to all relocations at the same offset and the following happens: - A new method Relocation::createExpr() is called for every relocation. This method is essentially the same as the original emit() except that it returns the MCExpr without emitting it. - The MCExprs of relocations i and i+1 are combined using the opcode returned by the new method Relocation::getComposeOpcodeFor(). - After combining all MCExprs, the last one is emitted. Note that in the current patch, getComposeOpcodeFor() simply calls llvm_unreachable() since none of the current targets use composed relocations. This will change once the RISC-V target lands. Finally, BinarySection::emitAsData() is updated to group relocations by offset and emit them all at once. Note that this means composed relocations are only supported in data sections. Since this is the only place they seem to be used in RISC-V, I believe it's reasonable to only support them there for now to avoid further code complexity. [1]: https://www.sco.com/developers/gabi/latest/ch4.reloc.html Reviewed By: rafauler Differential Revision: https://reviews.llvm.org/D146546
2023-05-11[BOLT] Fix flush pending relocsRafael Auler
https://github.com/facebookincubator/BOLT/pull/255 accidentally omitted a relocation type when refactoring the code. Add this type back and change function name so its intent is more clear. Reviewed By: #bolt, Amir Differential Revision: https://reviews.llvm.org/D150335
2023-03-24[BOLT] Don't use section relocations when computing hash for data from other ↵Denis Revunov
section When computing symbol hashes in BinarySection::hash, we try to find relocations in the section which reference the passed BinaryData. We do so by doing lower_bound on data begin offset and upper_bound on data end offset. Since offsets are relative to the current section, if it is a data from the previous section, we get underflow when computing offset and lower_bound returns Relocations.end(). If this data also ends where current section begins, upper_bound on zero offset will return some valid iterator if we have any relocations after the first byte. Then we'll try to iterate from lower_bound to upper_bound, since they're not equal, which in that case means we'll dereference Relocations.end(), increment it, and try to do so until we reach the second valid iterator. Of course we reach segfault earlier. In this patch we stop BOLT from searching relocations for symbols outside of the current section. Reviewed By: rafauler Differential Revision: https://reviews.llvm.org/D146620
2023-02-22[BOLT] Fix data reoder for aarch64Vladislav Khmelevsky
Use proper relocation for aarch64 Differential Revision: https://reviews.llvm.org/D144095
2022-11-24[Alignment][NFC] Use Align in MCStreamer::emitValueToAlignmentGuillaume Chatelet
Differential Revision: https://reviews.llvm.org/D138674
2022-10-13[BOLT] Section-handling refactoring/overhaulMaksim Panchenko
Simplify the logic of handling sections in BOLT. This change brings more direct and predictable mapping of BinarySection instances to sections in the input and output files. * Only sections from the input binary will have a non-null SectionRef. When a new section is created as a copy of the input section, its SectionRef is reset to null. * RewriteInstance::getOutputSectionName() is removed as the section name in the output file is now defined by BinarySection::getOutputName(). * Querying BinaryContext for sections by name uses their original name. E.g., getUniqueSectionByName(".rodata") will return the original section even if the new .rodata section was created. * Input file sections (with relocations applied) are emitted via MC with ".bolt.org" prefix. However, their name in the output binary is unchanged unless a new section with the same name is created. * New sections are emitted internally with ".bolt.new" prefix if there's a name conflict with an input file section. Their original name is preserved in the output file. * Section header string table is properly populated with section names that are actually used. Previously we used to include discarded section names as well. * Fix the problem when dynamic relocations were propagated to a new section with a name that matched a section in the input binary. E.g., the new .rodata with jump tables had dynamic relocations from the original .rodata. Reviewed By: rafauler Differential Revision: https://reviews.llvm.org/D135494
2022-10-07[BOLT] Change order of new sectionsMaksim Panchenko
While the order of new sections in the output binary was deterministic in the past (i.e. there was no run-to-run variation), it wasn't always rational as we used size to define the precedence of allocatable sections within "code" or "data" groups (probably unintentionally). Fix that by defining stricter section-ordering rules. Other than the order of sections, this should be NFC. Reviewed By: rafauler Differential Revision: https://reviews.llvm.org/D135235
2022-09-16[BOLT] Change base class of ExecutableFileMemoryManagerMaksim Panchenko
When we derive EFMM from SectionMemoryManager, it brings into EFMM extra functionality, such as the registry of exception handling sections, page permission management, etc. Such functionality is of no use to llvm-bolt and can even be detrimental (see https://github.com/llvm/llvm-project/issues/56726). Change the base class of ExecutableFileMemoryManager to MemoryManager, avoid registering EH sections, and skip memory finalization. Fixes #56726 Reviewed By: yota9 Differential Revision: https://reviews.llvm.org/D133994
2022-08-18Revert "[BOLT][NFC] Simplify addRelocation"Amir Ayupov
This reverts commit 29f23013226097a18ce90c48c9435f324956779b. This change breaks one of the internal tests.
2022-08-17[BOLT][NFC] Simplify addRelocationAmir Ayupov
Move the implementation out of the header file. Simplify the method. Add debug logging. Reviewed By: rafauler Differential Revision: https://reviews.llvm.org/D131811
2022-06-10[MC] De-capitalize SwitchSection. NFCFangrui Song
Add SwitchSection to return switchSection. The API will be removed soon.
2021-12-20[BOLTCore] [NFC] Fix braces usages according to LLVMRafael Auler
Summary: Fix according to Coding Standards doc, section Don't Use Braces on Simple Single-Statement Bodies of if/else/loop Statements. This set of changes applies to lib Core only. (cherry picked from FBD33240028)
2021-12-21[BOLT][NFC] Fix file-description commentsMaksim Panchenko
Summary: Fix comments at the start of source files. (cherry picked from FBD33274597)
2021-12-08[PR] Fix update-debug-sections for AArch64Elvina Yakubova
Summary: This patch adds AArch64 relocations handling in case updating of debug sections is enabled Elvina Yakubova, Advanced Software Technology Lab, Huawei (cherry picked from FBD33077609)
2021-12-14[BOLT][NFC] Reformat with clang-formatMaksim Panchenko
Summary: Selectively apply clang-format to BOLT code base. (cherry picked from FBD33119052)
2021-10-08Rebase: [NFC] Refactor sources to be buildable in shared modeRafael Auler
Summary: Moves source files into separate components, and make explicit component dependency on each other, so LLVM build system knows how to build BOLT in BUILD_SHARED_LIBS=ON. Please use the -c merge.renamelimit=230 git option when rebasing your work on top of this change. To achieve this, we create a new library to hold core IR files (most classes beginning with Binary in their names), a new library to hold Utils, some command line options shared across both RewriteInstance and core IR files, a new library called Rewrite to hold most classes concerned with running top-level functions coordinating the binary rewriting process, and a new library called Profile to hold classes dealing with profile reading and writing. To remove the dependency from BinaryContext into X86-specific classes, we do some refactoring on the BinaryContext constructor to receive a reference to the specific backend directly from RewriteInstance. Then, the dependency on X86 or AArch64-specific classes is transfered to the Rewrite library. We can't have the Core library depend on targets because targets depend on Core (which would create a cycle). Files implementing the entry point of a tool are transferred to the tools/ folder. All header files are transferred to the include/ folder. The src/ folder was renamed to lib/. (cherry picked from FBD32746834)