1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.flat.prefetch.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.flat.prefetch.ll
index d5fba2df0b82..8f4a473a2d5e 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.flat.prefetch.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.flat.prefetch.ll
@@ -7,6 +7,7 @@ declare void @llvm.amdgcn.flat.prefetch(ptr %ptr, i32 %col)
 define amdgpu_ps void @flat_prefetch(ptr %ptr) {
 ; GCN-LABEL: flat_prefetch:
 ; GCN:       ; %bb.0: ; %entry
+; GCN-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
 ; GCN-NEXT:    flat_prefetch_b8 v[0:1]
 ; GCN-NEXT:    s_endpgm
 entry:
@@ -17,6 +18,7 @@ entry:
 define amdgpu_ps void @flat_prefetch_sgpr(ptr inreg %ptr) {
 ; GCN-LABEL: flat_prefetch_sgpr:
 ; GCN:       ; %bb.0: ; %entry
+; GCN-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
 ; GCN-NEXT:    v_mov_b32_e32 v0, 0
 ; GCN-NEXT:    flat_prefetch_b8 v0, s[0:1]
 ; GCN-NEXT:    s_endpgm
@@ -28,6 +30,7 @@ entry:
 define amdgpu_ps void @flat_prefetch_offset(ptr %ptr) {
 ; GCN-LABEL: flat_prefetch_offset:
 ; GCN:       ; %bb.0: ; %entry
+; GCN-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
 ; GCN-NEXT:    flat_prefetch_b8 v[0:1] offset:512
 ; GCN-NEXT:    s_endpgm
 entry:
@@ -39,6 +42,7 @@ entry:
 define amdgpu_ps void @flat_prefetch_sgpr_voffset(ptr inreg %ptr, i32 %offset) {
 ; GCN-LABEL: flat_prefetch_sgpr_voffset:
 ; GCN:       ; %bb.0: ; %entry
+; GCN-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
 ; GCN-NEXT:    flat_prefetch_b8 v0, s[0:1]
 ; GCN-NEXT:    s_endpgm
 entry:
@@ -50,6 +54,7 @@ entry:
 define amdgpu_ps void @flat_prefetch_sgpr_voffset_offset(ptr inreg %ptr, i32 %offset) {
 ; GCN-LABEL: flat_prefetch_sgpr_voffset_offset:
 ; GCN:       ; %bb.0: ; %entry
+; GCN-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
 ; GCN-NEXT:    flat_prefetch_b8 v0, s[0:1] offset:128
 ; GCN-NEXT:    s_endpgm
 entry:
@@ -62,6 +67,7 @@ entry:
 define amdgpu_ps void @flat_prefetch_se(ptr %ptr) {
 ; GCN-LABEL: flat_prefetch_se:
 ; GCN:       ; %bb.0: ; %entry
+; GCN-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
 ; GCN-NEXT:    flat_prefetch_b8 v[0:1] scope:SCOPE_SE
 ; GCN-NEXT:    s_endpgm
 entry:
@@ -72,6 +78,7 @@ entry:
 define amdgpu_ps void @flat_prefetch_se_nt(ptr %ptr) {
 ; GCN-LABEL: flat_prefetch_se_nt:
 ; GCN:       ; %bb.0: ; %entry
+; GCN-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
 ; GCN-NEXT:    flat_prefetch_b8 v[0:1] th:TH_LOAD_NT scope:SCOPE_SE
 ; GCN-NEXT:    s_endpgm
 entry:
@@ -82,6 +89,7 @@ entry:
 define amdgpu_ps void @flat_prefetch_dev_ht(ptr %ptr) {
 ; GCN-LABEL: flat_prefetch_dev_ht:
 ; GCN:       ; %bb.0: ; %entry
+; GCN-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
 ; GCN-NEXT:    flat_prefetch_b8 v[0:1] th:TH_LOAD_HT scope:SCOPE_DEV
 ; GCN-NEXT:    s_endpgm
 entry:
@@ -92,6 +100,7 @@ entry:
 define amdgpu_ps void @flat_prefetch_sys_lu(ptr %ptr) {
 ; GCN-LABEL: flat_prefetch_sys_lu:
 ; GCN:       ; %bb.0: ; %entry
+; GCN-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
 ; GCN-NEXT:    flat_prefetch_b8 v[0:1] th:TH_LOAD_BYPASS scope:SCOPE_SYS
 ; GCN-NEXT:    s_endpgm
 entry: