diff options
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineScheduler.cpp | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp index 91aaeea156c4..393530f56cc2 100644 --- a/llvm/lib/CodeGen/MachineScheduler.cpp +++ b/llvm/lib/CodeGen/MachineScheduler.cpp @@ -1288,7 +1288,7 @@ void ScheduleDAGMILive::initRegPressure() { // Account for liveness generated by the region boundary. if (LiveRegionEnd != RegionEnd) { - SmallVector<RegisterMaskPair, 8> LiveUses; + SmallVector<VRegMaskOrUnit, 8> LiveUses; BotRPTracker.recede(&LiveUses); updatePressureDiffs(LiveUses); } @@ -1352,9 +1352,8 @@ updateScheduledPressure(const SUnit *SU, /// Update the PressureDiff array for liveness after scheduling this /// instruction. -void ScheduleDAGMILive::updatePressureDiffs( - ArrayRef<RegisterMaskPair> LiveUses) { - for (const RegisterMaskPair &P : LiveUses) { +void ScheduleDAGMILive::updatePressureDiffs(ArrayRef<VRegMaskOrUnit> LiveUses) { + for (const VRegMaskOrUnit &P : LiveUses) { Register Reg = P.RegUnit; /// FIXME: Currently assuming single-use physregs. if (!Reg.isVirtual()) @@ -1579,7 +1578,7 @@ unsigned ScheduleDAGMILive::computeCyclicCriticalPath() { unsigned MaxCyclicLatency = 0; // Visit each live out vreg def to find def/use pairs that cross iterations. - for (const RegisterMaskPair &P : RPTracker.getPressure().LiveOutRegs) { + for (const VRegMaskOrUnit &P : RPTracker.getPressure().LiveOutRegs) { Register Reg = P.RegUnit; if (!Reg.isVirtual()) continue; @@ -1707,7 +1706,7 @@ void ScheduleDAGMILive::scheduleMI(SUnit *SU, bool IsTopNode) { if (BotRPTracker.getPos() != CurrentBottom) BotRPTracker.recedeSkipDebugValues(); - SmallVector<RegisterMaskPair, 8> LiveUses; + SmallVector<VRegMaskOrUnit, 8> LiveUses; BotRPTracker.recede(RegOpers, &LiveUses); assert(BotRPTracker.getPos() == CurrentBottom && "out of sync"); LLVM_DEBUG(dbgs() << "Bottom Pressure:\n"; dumpRegSetPressure( |