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| author | Jingu Kang <jingu.kang@arm.com> | 2021-09-30 15:39:10 +0100 |
|---|---|---|
| committer | Jingu Kang <jingu.kang@arm.com> | 2021-10-25 09:47:07 +0100 |
| commit | a502436259307f95e9c95437d8a1d2d07294341c (patch) | |
| tree | d71f54a4658a56b8a8fb6f8e687122a2ea91aba0 /mlir/test/python/lib/PythonTestDialect.cpp | |
| parent | 6fa1b4ff4b05b9b9a432f7310802255c160c8f4f (diff) | |
[AArch64] Remove redundant ORRWrs which is generated by zero-extend
%3:gpr32 = ORRWrs $wzr, %2, 0
%4:gpr64 = SUBREG_TO_REG 0, %3, %subreg.sub_32
If AArch64's 32-bit form of instruction defines the source operand of ORRWrs,
we can remove the ORRWrs because the upper 32 bits of the source operand are
set to zero.
Differential Revision: https://reviews.llvm.org/D110841
Diffstat (limited to 'mlir/test/python/lib/PythonTestDialect.cpp')
0 files changed, 0 insertions, 0 deletions