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| author | wanglei <wanglei@loongson.cn> | 2024-03-05 09:15:44 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-03-05 09:15:44 +0800 |
| commit | a5c90e48b6f11bc6db7344503589648f76b16d80 (patch) | |
| tree | 49af2c257aa3b645619b93e3c7e7b2cf2b3e3a18 /mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp | |
| parent | 275fe3ae2dced8275a1dd85a4f892fee99d322e2 (diff) | |
[LoongArch] Switch to the Machine Scheduler (#83759)
The SelectionDAG scheduling preference now becomes source order
scheduling (machine scheduler generates better code -- even without
there being a machine model defined for LoongArch yet).
Most of the test changes are trivial instruction reorderings and
differing register allocations, without any obvious performance impact.
This is similar to commit: 3d0fbafd0bce43bb9106230a45d1130f7a40e5ec
Diffstat (limited to 'mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp')
0 files changed, 0 insertions, 0 deletions