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authorAlex Bradbury <asb@igalia.com>2023-08-03 07:05:12 +0100
committerAlex Bradbury <asb@igalia.com>2023-08-03 07:06:57 +0100
commit8a71f44e00a901c39a3d05262bbda914b9283308 (patch)
treefc907e70e14b91ea48ed1f15463a6c82e67566ce /mlir/lib/Bytecode
parentdf0b1df99c9ccf110482661678321e596566c725 (diff)
[RISCV] Expand test coverage of bf16 operations with Zfbfmin and fix gaps
This doesn't bring us to parity with the test/CodeGen/RISCV/half-* test cases, it simply picks off an initial set that can be supported especially easy. In order to make the review more manageable, I'll follow up with other cases. There is zero innovation in the test cases - they simply take the existing half/float cases and replace f16->bf16 and half->bfloat. Differential Revision: https://reviews.llvm.org/D156895
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