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| author | Kazu Hirata <kazu@google.com> | 2024-04-30 12:21:29 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-04-30 12:21:29 -0700 |
| commit | 9b07a035f1802e826d2186eae1875d010048618a (patch) | |
| tree | f180cb1a803c9992c764f6e84d837a9c94cf0b76 /llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp | |
| parent | 5f88f0c63fa75169665732a3377f5bb3fef6256d (diff) | |
[Hexagon] Let ArrayRef infer the array size (NFC) (#90534)
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp')
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp b/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp index 6b0315bc1bef..31e37dcce415 100644 --- a/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp +++ b/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp @@ -1006,8 +1006,7 @@ bool HexagonHardwareLoops::isInvalidLoopOperation(const MachineInstr *MI, static const Register Regs01[] = { LC0, SA0, LC1, SA1 }; static const Register Regs1[] = { LC1, SA1 }; - auto CheckRegs = IsInnerHWLoop ? ArrayRef(Regs01, std::size(Regs01)) - : ArrayRef(Regs1, std::size(Regs1)); + auto CheckRegs = IsInnerHWLoop ? ArrayRef(Regs01) : ArrayRef(Regs1); for (Register R : CheckRegs) if (MI->modifiesRegister(R, TRI)) return true; |