diff options
| author | Nikita Popov <npopov@redhat.com> | 2024-09-20 14:35:38 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-09-20 14:35:38 +0200 |
| commit | cee0bf962648cf69a07e58dd8b02977d2a7e6007 (patch) | |
| tree | eea59d6e94d7aab1c60e14f5284e600bf4873035 /llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | |
| parent | 3127b659fad358b135721bd937fead49e5c73de5 (diff) | |
[AMDGPU] Use Lo_32 and Hi_32 helpers (NFC) (#109413)
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIFrameLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp index dfdc7ad32b00..2c67c4aedfe4 100644 --- a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp @@ -829,12 +829,12 @@ void SIFrameLowering::emitEntryFunctionScratchRsrcRegSetup( } BuildMI(MBB, I, DL, SMovB32, Rsrc2) - .addImm(Rsrc23 & 0xffffffff) - .addReg(ScratchRsrcReg, RegState::ImplicitDefine); + .addImm(Lo_32(Rsrc23)) + .addReg(ScratchRsrcReg, RegState::ImplicitDefine); BuildMI(MBB, I, DL, SMovB32, Rsrc3) - .addImm(Rsrc23 >> 32) - .addReg(ScratchRsrcReg, RegState::ImplicitDefine); + .addImm(Hi_32(Rsrc23)) + .addReg(ScratchRsrcReg, RegState::ImplicitDefine); } else if (ST.isAmdHsaOrMesa(Fn)) { assert(PreloadedScratchRsrcReg); |