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authorVitaly Buka <vitalybuka@google.com>2024-09-10 09:51:43 -0700
committerGitHub <noreply@github.com>2024-09-10 09:51:43 -0700
commitc7a7767fca736d0447832ea4d4587fb3b9e797c2 (patch)
tree4c8e6b67195311e57694ab8297357cd3c312f623 /llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
parent14b43563d1618c71385f3ac15a475adf9d0ef5f9 (diff)
Revert "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (#108054)
Breaks bots, see #105822. Reverts llvm/llvm-project#105822
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIFrameLowering.cpp')
-rw-r--r--llvm/lib/Target/AMDGPU/SIFrameLowering.cpp12
1 files changed, 4 insertions, 8 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
index dfdc7ad32b00..8c951105101d 100644
--- a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
@@ -1343,14 +1343,10 @@ void SIFrameLowering::processFunctionBeforeFrameFinalized(
// Allocate spill slots for WWM reserved VGPRs.
// For chain functions, we only need to do this if we have calls to
- // llvm.amdgcn.cs.chain (otherwise there's no one to save them for, since
- // chain functions do not return) and the function did not contain a call to
- // llvm.amdgcn.init.whole.wave (since in that case there are no inactive lanes
- // when entering the function).
- bool IsChainWithoutRestores =
- FuncInfo->isChainFunction() &&
- (!MF.getFrameInfo().hasTailCall() || FuncInfo->hasInitWholeWave());
- if (!FuncInfo->isEntryFunction() && !IsChainWithoutRestores) {
+ // llvm.amdgcn.cs.chain.
+ bool IsChainWithoutCalls =
+ FuncInfo->isChainFunction() && !MF.getFrameInfo().hasTailCall();
+ if (!FuncInfo->isEntryFunction() && !IsChainWithoutCalls) {
for (Register Reg : FuncInfo->getWWMReservedRegs()) {
const TargetRegisterClass *RC = TRI->getPhysRegBaseClass(Reg);
FuncInfo->allocateWWMSpill(MF, Reg, TRI->getSpillSize(*RC),