diff options
| author | Diana Picus <Diana-Magda.Picus@amd.com> | 2024-09-13 11:54:30 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-09-13 11:54:30 +0200 |
| commit | 335620853117153e52ce54fe4e879f66aa23ff99 (patch) | |
| tree | 9561b826ac89cbee94ac0e10072e799997d247bd /llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | |
| parent | d4f6ad51603405ab4e998fa6416bfdff4b1f43d4 (diff) | |
Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (#108512)
This reverts commit
https://github.com/llvm/llvm-project/commit/7792b4ae79e5ac9355ee13b01f16e25455f8427f.
The problem was a conflict with
https://github.com/llvm/llvm-project/commit/e55d6f5ea2656bf842973d8bee86c3ace31bc865
"[AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive
(https://github.com/llvm/llvm-project/pull/107889)"
which changed the syntax of V_SET_INACTIVE (and thus made my MIR test
crash).
...if only we had a merge queue.
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIFrameLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp index 8c951105101d..dfdc7ad32b00 100644 --- a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp @@ -1343,10 +1343,14 @@ void SIFrameLowering::processFunctionBeforeFrameFinalized( // Allocate spill slots for WWM reserved VGPRs. // For chain functions, we only need to do this if we have calls to - // llvm.amdgcn.cs.chain. - bool IsChainWithoutCalls = - FuncInfo->isChainFunction() && !MF.getFrameInfo().hasTailCall(); - if (!FuncInfo->isEntryFunction() && !IsChainWithoutCalls) { + // llvm.amdgcn.cs.chain (otherwise there's no one to save them for, since + // chain functions do not return) and the function did not contain a call to + // llvm.amdgcn.init.whole.wave (since in that case there are no inactive lanes + // when entering the function). + bool IsChainWithoutRestores = + FuncInfo->isChainFunction() && + (!MF.getFrameInfo().hasTailCall() || FuncInfo->hasInitWholeWave()); + if (!FuncInfo->isEntryFunction() && !IsChainWithoutRestores) { for (Register Reg : FuncInfo->getWWMReservedRegs()) { const TargetRegisterClass *RC = TRI->getPhysRegBaseClass(Reg); FuncInfo->allocateWWMSpill(MF, Reg, TRI->getSpillSize(*RC), |