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| author | Craig Topper <craig.topper@sifive.com> | 2025-02-24 09:55:34 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-02-24 09:55:34 -0800 |
| commit | 571b787b83cb1bfc7d4c8214b296ec965e7bb7e2 (patch) | |
| tree | fb586aa0fc3de7ab2697552cdd75ced885a78b14 /llvm/lib/Target/AMDGPU/R600InstrInfo.cpp | |
| parent | 664cbd1b5db190724ceea498d1f520eb66d78d69 (diff) | |
[CodeGen] Change copyPhysReg interface to use Register instead of MCRegister. (#128473)
NVPTX, SPIRV, and WebAssembly pass virtual registers to this function
since they don't perform register allocation. We need to use Register to
avoid a virtual register being converted to MCRegister by the caller.
Diffstat (limited to 'llvm/lib/Target/AMDGPU/R600InstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/R600InstrInfo.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp b/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp index 1c4a992c8727..fb586fa09032 100644 --- a/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp @@ -37,8 +37,8 @@ bool R600InstrInfo::isVector(const MachineInstr &MI) const { void R600InstrInfo::copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - const DebugLoc &DL, MCRegister DestReg, - MCRegister SrcReg, bool KillSrc, + const DebugLoc &DL, Register DestReg, + Register SrcReg, bool KillSrc, bool RenamableDest, bool RenamableSrc) const { unsigned VectorComponents = 0; if ((R600::R600_Reg128RegClass.contains(DestReg) || |