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| author | Mariusz Sikora <mariusz.sikora@amd.com> | 2025-03-19 07:35:09 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-03-19 07:35:09 +0100 |
| commit | 575fde0995aaf60882f433baebf56de2b89195e2 (patch) | |
| tree | d8f6fd18b5bb5ff241b6a695baa81fc6b39a2a41 /llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp | |
| parent | f017073cd8ac9e627db17678c6b64e9abe4fbec7 (diff) | |
[AMDGPU] Add intrinsic and MI for image_bvh_dual_intersect_ray (#130038)
- Add llvm.amdgcn.image.bvh.dual.intersect.ray intrinsic and
image_bvh_dual_intersect_ray machine instruction.
- Add llvm_v10i32_ty and llvm_v10f32_ty
---------
Co-authored-by: Mateja Marjanovic <mateja.marjanovic@amd.com>
Diffstat (limited to 'llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp index 728ce125eba2..847121f25136 100644 --- a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp +++ b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp @@ -268,6 +268,7 @@ DECODE_OPERAND_REG_8(VReg_128) DECODE_OPERAND_REG_8(VReg_192) DECODE_OPERAND_REG_8(VReg_256) DECODE_OPERAND_REG_8(VReg_288) +DECODE_OPERAND_REG_8(VReg_320) DECODE_OPERAND_REG_8(VReg_352) DECODE_OPERAND_REG_8(VReg_384) DECODE_OPERAND_REG_8(VReg_512) |