CodeGen: Don't lazily construct MachineFunctionInfo

This fixes what I consider to be an API flaw I've tripped over
multiple times. The point this is constructed isn't well defined, so
depending on where this is first called, you can conclude different
information based on the MachineFunction. For example, the AMDGPU
implementation inspected the MachineFrameInfo on construction for the
stack objects and if the frame has calls. This kind of worked in
SelectionDAG which visited all allocas up front, but broke in
GlobalISel which hasn't visited any of the IR when arguments are
lowered.

I've run into similar problems before with the MIR parser and trying
to make use of other MachineFunction fields, so I think it's best to
just categorically disallow dependency on the MachineFunction state in
the constructor and to always construct this at the same time as the
MachineFunction itself.

A missing feature I still could use is a way to access an custom
analysis pass on the IR here.

1 files changed, 10 insertions, 7 deletions

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp b/llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
index 9f2e2bfdaf78..a6a32b98f44c 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
@@ -16,17 +16,15 @@
 
 using namespace llvm;
 
-AMDGPUMachineFunction::AMDGPUMachineFunction(const MachineFunction &MF)
-    : IsEntryFunction(AMDGPU::isEntryFunctionCC(
-                                  MF.getFunction().getCallingConv())),
+AMDGPUMachineFunction::AMDGPUMachineFunction(const Function &F,
+                                             const AMDGPUSubtarget &ST)
+    : IsEntryFunction(AMDGPU::isEntryFunctionCC(F.getCallingConv())),
       IsModuleEntryFunction(
-          AMDGPU::isModuleEntryFunctionCC(MF.getFunction().getCallingConv())),
-      NoSignedZerosFPMath(MF.getTarget().Options.NoSignedZerosFPMath) {
-  const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(MF);
+          AMDGPU::isModuleEntryFunctionCC(F.getCallingConv())),
+      NoSignedZerosFPMath(false) {
 
   // FIXME: Should initialize KernArgSize based on ExplicitKernelArgOffset,
   // except reserved size is not correctly aligned.
-  const Function &F = MF.getFunction();
 
   Attribute MemBoundAttr = F.getFnAttribute("amdgpu-memory-bound");
   MemoryBound = MemBoundAttr.getValueAsBool();
@@ -46,6 +44,11 @@ AMDGPUMachineFunction::AMDGPUMachineFunction(const MachineFunction &MF)
   CallingConv::ID CC = F.getCallingConv();
   if (CC == CallingConv::AMDGPU_KERNEL || CC == CallingConv::SPIR_KERNEL)
     ExplicitKernArgSize = ST.getExplicitKernArgSize(F, MaxKernArgAlign);
+
+  // FIXME: Shouldn't be target specific
+  Attribute NSZAttr = F.getFnAttribute("no-signed-zeros-fp-math");
+  NoSignedZerosFPMath =
+      NSZAttr.isStringAttribute() && NSZAttr.getValueAsString() == "true";
 }
 
 unsigned AMDGPUMachineFunction::allocateLDSGlobal(const DataLayout &DL,